基于ATE与BIT组合的NAMP自动测试与故障诊断系统设计

在对机械电气系统状态监控处理机(NAMP)功能、组成、BIT和ATE测试接口等进行测试需求分析基础上,基于ATE系统平台完成了NAMP的自动测试原理和测试流程设计,采用BIT和ATE组合测试技术完成了NAMP的自动测试,采用故障树法完成了NAMP的故障诊断功能。经故障注入实验和使用验证表明,该系统具有测试内容全面,故障定位准确,故障隔离率高等特点。     

飞机综合诊断系统综述

针对现役飞机在使用和维护过程中暴露出的问题，提出了构建综合诊断系统平台的初步设想，并重点介绍了智能机内测试（BIT）技术、ATE／ATS、故障预测和状态管理（PHM）技术、便携式辅助诊断设备（PDA）和远程维护诊断等关键技术。     

改善电子系统故障诊断能力的神经网络虚警过滤器技术

分析了现代电子系统机内测试 (BIT)技术存在的虚警问题 ,提出运用神经网络虚警过滤器(NNFAF)技术来降低虚警、改进BIT能力 ;并介绍了NNFAF的原理和网络开发方法 ;最后分析了NN FAF技术的特点、应用及发展方向。     

BIT综合表示模型研究

 在分析机内测试(BIT)主要设计要素组成的基础上,提出了BIT综合表示模型。建立了BIT综合表示模型的数学定义,包括BIT单元模型、BIT层次关系集合、BIT数据传送方式集合、BIT执行次序集合和BIT综合表示模型。在数学定义的基础上,进一步建立了BIT综合表示的框图模型和表格模型,这两种模型可以直接用于工程分析。最后,以某辅助导航系统为案例,进行了BIT综合表示模型的应用,给出了框图模型结果和表格模型结果,验证了该模型的可用性和有效性。     

基于IVI和信号测试的通用ATE

介绍了可互换的虚拟仪器技术的技术背景、体系结构、类驱动器、测量和激励子系统等，讨论了在ATE中基于信号的测试方法，建立了一个基于IVI技术和信号测试的ATE，将信号测试和可互换的虚拟仪器技术结合起来，实现测试程序和测试仪器之间的松耦合，在更高的层次实现测试仪器的可互换和测试程序的可移植。     

一种基于ROM模型的测试性指标论证方法

针对实践中缺乏理论性、可实施性强的测试性指标论证方法的现状,提出了一种基于可靠度、战备完好率与可维修度（ROM）模型的测试性指标论证方法。从战备完好率（O）、可靠度（R）、可维修度（M）关系式入手,将关系式中的可靠度和可维修度分别用平均故障间隔时间（MTBF）和平均修复时间（MTTR）替换,再建立MTBF和MTTR与故障诊断率、虚警率和机内测试（BIT）故障率的关系式并代入"ROM"关系式,得到战备完好率与测试性指标之间的关系式,建立待解指标与BIT数量之间的关系式,通过代入和消减参数得到战备完好率随BIT数量变化曲线,通过找到曲线极值点得到最佳BIT数量,进而得到最佳的测试性指标。在模型构建和指标求解过程中进行了较为充分的仿真分析,得到了大量与经验相符的规律性结论,为不同对象应用该方法进行参数设置时提供了较为充分的参考。最后应用本文方法对某光电一体化设备进行了指标论证,演示并验证了本文方法的有效性。     

机内测试定量要求的现场试验验证方法研究

阐述了机内测试(BIT)定量要求现场试验验证方法的内涵和实施流程。根据置信度水平和功能单元覆盖要求计算BIT故障检测率、故障隔离率和虚警率综合验证的样本量,根据BIT参数的单侧置信限进行合格判断。给出了数据统计判据、分类流程和统一记录表格。通过案例应用说明了该方法的可行性。     

关于新一代航空电子设备ATE的初步设想

一、ATE技术的回顾与展望 ATE技术的发展始于五十年代。根据当时航空电子设备的情况,确立了飞行前测试、外场测试和中间车间测试的自动测试概念,建立了自动测试的一些基本原理。例如通过/不通过测试、故障隔离和预测、程序测试、自测试以及ATE标准化等概念。在第一代ATE的总体结构中,多采用穿孔纸带程序机构和硬件控制器。 数字计算机技术的发展,给ATE技术以极大的推动。键盘取代了操作员控制板,     

机内测试虚警分析和控制

现代飞行器广泛采用机内测试(Built-intest,BIT)技术,以便对其内部故障进行自动检测、诊断和隔离,但是常规BIT面临诊断能力不足和诊断模糊性等问题,导致BIT虚警率高,难以有效发挥其应有的作用.本文论述了BIT虚警的基本理论、虚警的危害及现状,并从BIT虚警产生的原因分析入手,提出了解决虚警问题的一些方法和措施.     

BIT技术在数字飞行控制系统中的应用

由于计算机在飞控系统中的应用,使得含有计算机的设备或系统有了实现全面功能与性能自我测试(BIT)和故障诊断的可能。本文论述了BIT技术在新型飞行控制系统中的设计与应用,并在最后论述了BIT的发展前景。     

Role of BIT in support system maintenance and availability

The role of built in test (BIT) in electronic systems has grown in prominence with the advances in system complexity and concern over maintenance lifecycle costs of large systems. In an environment where standards drive system designs (and provide an avenue for focused advancement in technology), standards for BIT are very much in an evolutionary state. The reasons for advancing the effectiveness of BIT include reduced support overhead, greater, confidence in operation, and increased system availability. The cost of supporting military electronic systems (avionics, communications, and weapons systems) has driven much of the development in BIT technology. But what about the systems that support these end items that contain test and measurement instrumentation - such as automatic test equipment (ATE), simulators and avionics development suites? There has also been a beneficial effect on the maintenance and availability of these systems due to the infusion of BIT into their component assemblies. But the effect has been much more sporadic and fragmented. This paper looks at the state of BIT in test and measurement instruments, explain its affect on system readiness, and present ideas on how to improve BIT technologies and standards. This will not provide definitive answers to BIT development questions, since the factors that affect it are specific to the instrument itself. The topics covered in this paper are: definitions of built-in test, instrument BIT history, importance of BIT fault coverage and isolation in support systems, overview of BIT development process issues that limit the effectiveness of BIT Standards related to instrument BIT, making BIT more effective in support system maintenance and availability and conclusions.     

An Approach to Built-In Testing

The archiitecture and justification for an approach to built-in testing (BIT) in electronic circuits and systems is presented. The proposed system is capable of on-line fault detection and prediction up to the shop replaceable assembly (SRA) level and is designed to interface with external automatic test equipment (ATE) for off-line fault diagnosis within the SRA. The constituent parts of the BIT system have been extensively simulated and the approach appears to be suitable for hardware implementation both with respect to computational and economic considerations.     

ATE综合校准系统的软件设计及实现

通用自动测试设备（ATE）的测量准确性、可靠性会直接影响飞机综合保障的质量,因此,对此检测设备进行全面有效的测试校准,是确保测试系统完成任务的关键。为了保障测试数据准确可靠和量值传递统一及实现现场的系统性校准工作,本课题以通用自动测试设备为对象,建立了一套基于虚拟仪器技术基础上的综合校准系统。本文对系统的软件结构设计进行了分析和设计,以LCOD原型生命周期为基础,使用了面对组件的设计模式,设计和实现了软件功能,使得该系统具有一定的兼容性和可移植性,并且为扩展留下了接口,同时保证了校准数据的可靠性和精确性。     

Using built-in-test to reduce TPS run times and improve TPSreliability

This paper addresses using information derived from Built-in-Test (BIT) to fault diagnose Units Under Test (UUTs), wherever possible. This philosophic approach to diagnostic testing is not new. It has been studied over the past 20 years under the visor of “Integrated Diagnostics”, but it has yet to be truly implemented in a “real life” military diagnostic test environment. The mindset of Test Program Set design engineering, along with customer and contractor management alike, remains “complete diagnostic testing based upon single catastrophic component failure modes”. If we are to generate cost efficient Test Program Sets (TPSs) under reduced military budget constraints, this will have to change! The test engineer must be encouraged to use methodologies to speed up development time and decrease TPS run times. Using present technology, this is possible now, and as the technology matures, will become a truly viable approach in the future. For the purpose of this paper, the author relies heavily on his extensive US Navy Automatic Test Equipment (ATE) and Test Program Set (TPS) experience, as well as on previous studies performed on using BIT to fault diagnose Unit Under Test failures on US Naval Air weapon systems     

自动测试设备的效率方程

效率是各项指标的综合度量。首先提出度量自动测试设备(ATE)效率的8项技术指标:故障检测率FDR、故障隔离率FIR、检测准确度FDA、测试时间t_d、故障检测概率P_d、故障漏报概率P_m、虚警概率P_f和故障分辨率δ。重点是建立ATE的效率方程,包括建立和求解ATE的工作状态方程,导出故障检测效率方程,无模糊故障隔离的效率方程和模糊故障隔离的效率方程,即ATE的效率方程,从而为ATE指标的分析与综合提供一种理论依据。     

航空电子设备机内自检的设计

介绍了机内自检设计的一般原则;给出了电子设备机内自检的具体设计方案;提出了设计中减少虚警的具体办法。     

基于马尔科夫链的自动测试设备可靠性预测

自动测试设备在生产和科研过程中非常重要,其可靠性在科研和生产中有着重要的意义。通过对马尔可夫链的分析,提出了基于马尔可夫链建立的自动测试设备可靠性预测的模型,根据某一阶段的自动测试设备故障数据,对下一阶段该自动测试设备可靠性进行预测,从而得到自动测试设备基于马尔可夫链的可靠性预测结果。