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1.
测试性是航空电子设备基本设计特性,测试性设计的好坏直接决定了航空电子设备感知自身状态(正常、故障和降级)并自动隔离内部故障的能力。从全寿命周期费用探讨了民用飞机航空电子设备开展测试性设计的必要性,给出了民用飞机研制过程中航空电子设备通用测试性设计、机内测试设计和电路及元器件的测试性设计考虑。实践证明航空电子设备开展测试性设计能有效提高民用飞机的功能安全性和维修经济性。  相似文献   

2.
为了评价航空发动机数字电子控制器机内自测试检测能力,提出了一种面向全权限数字电子控制(FADEC)系统机内自测试(BIT)验证的综合故障注入器的设计思想。综合故障注入器采用ARM处理器作为核心控制器;基于数模混合电路,分别通过后驱动技术和电压求和技术实现对数字电路节点和模拟电路节点的故障注入;针对各种传感器和执行机构的电气特征,设计了具有良好逼真度的接口模拟电路,从而与电子控制器(EEC)构成FADEC系统运行环境。通过对具有BIT功能的电子控制器原理样机的故障注入实验,证明该综合故障注入器作为航空发动机FADEC系统BIT设计和应用研究的工具是非常有效的。   相似文献   

3.
航空发动机电子控制器向更高性能和更高集成度的方向发展,使得传统测试方法难以满足需要。本文提出了通过边界扫描技术来解决电子控制器核心电路的测试问题。为了论证这一方案的可行性,设计了边界扫描测试技术验证平台,主要包括边界扫描测试适配器和被测电路。对被测电路开展了基于边界扫描的测试试验,完成了主要指令的测试。同时通过扫描链实现了对被测电路的故障注入,通过这种方法注入故障可对航空发动机电子控制器的机内测试(BIT)能力进行验证。本文探索了边界扫描测试技术在航空发动机电子控制器中的应用  相似文献   

4.
边界扫描技术在电子控制器测试中的应用   总被引:2,自引:1,他引:1  
航空发动机电子控制器向更高性能和更高集成度的方向发展,使得传统测试方法难以满足需要.提出了通过边界扫描技术来解决电子控制器核心电路的测试问题.设计了边界扫描测试技术验证平台,主要包括边界扫描测试适配器和被测电路.对被测电路开展了基于边界扫描的测试试验,完成了主要指令的测试.同时通过扫描链实现了对被测电路的故障注入,通过这种方法注入故障可对航空发动机电子控制器的机内测试(BIT)能力进行验证.   相似文献   

5.
航空发动机数字电子控制器的BIT技术   总被引:1,自引:0,他引:1  
针对航空发动机数字电子控制器BIT的特殊性,研究电子控制器、传感器、执行机构及发动机系统的故障检测方法,规范BIT电路、检测算法和程序,并发展新型高效的检测技术和BIT有效性评价技术是非常有意义的.  相似文献   

6.
详细介绍了BIT和ATE组合测试技术及其在机载电子设备测试与故障诊断的具体应用。应用表明BIT和ATE组合测试技术可有效提高设备的测试性。  相似文献   

7.
一种供电特性试验设备的实现方法   总被引:1,自引:0,他引:1  
冯非 《航空计算技术》2010,40(4):118-120
随着航空电子技术的发展,实现对航空电子设备供电特性的自动化检测就变得日益重要。介绍了一种在实验室环境下实现供电特性试验自动化测试的方法。根据国内外现行的相关测试标准对机载电子设备的供电特性测试要求,以及实验室原有电源测试设备,从硬件结构和软件程序两方面进行了分析;并进行硬件改造、软件升级,设计了输出管理部件、增加了高精度可控源、更改了部分测试程序,实现了输入浪涌、输入瞬变等测试功能,从而完成机载电子设备的供电特性试验。  相似文献   

8.
朱新宇 《民航科技》2001,(5):62-63,67
检内检测(Built-in-test)技术在飞机上得到了广泛的应用,在航空电子设备中基本上都有使用,但应用于我国自行研制的飞机电源系统却刚刚起步,文中介绍了BIT春使用特点,并以民航飞机中的典型电源系统为例介绍了BIT的使用情况,最后提出了在BI研制中应该注意的问题。  相似文献   

9.
功能分析与失效物理结合的可靠性预计方法   总被引:2,自引:0,他引:2  
陈云霞  谢汶姝  曾声奎 《航空学报》2008,29(5):1133-1138
 可靠性预计是产品设计、研发过程中的重要工作,全面准确的可靠性预计可以评价产品的可靠性水平,也可以为设计提供信息,指导设计。全面分析总结当前电子设备可靠性预计相关技术方法,以当前基于失效物理(POF)技术的系统可靠性预计方法中,并未考虑产品功能组成关系的缺陷为突破点,建立了一种以失效物理分析为基础,综合考虑电路功能组成关系的电子设备可靠性预计方法。该方法从电路功能出发,通过灵敏度仿真和主成分分析两种方法,确定对电路性能起主要影响的关键单元,再通过失效物理分析或统计规律明确单元的失效概率分布,通过混合分布获得系统的分布,得到系统可靠性指标。最后以某航空机电产品的电源电路为案例,对本预计方法进行验证。  相似文献   

10.
某机载电子设备总体结构设计   总被引:2,自引:0,他引:2  
从结构设计角度出发,根据航空平台的工作模式和环境空间要求,针对某机载电子设备的标准化设计、热设计、电磁兼容性设计、防冲击、振动、"三防"设计等方面进行了论述。结合型号设计的工程经验,以航空电子设备结构设计的特点和原则为重点,对机载电子设备的结构设计进行了阐述,通过合理的布局设计和仿真计算来实现结构设计要求。介绍机载电子设备结构设计的经验,可供同行参考。  相似文献   

11.
Test results judgment method based on BIT faults   总被引:1,自引:0,他引:1  
Built-in-test(BIT) is responsible for equipment fault detection, so the test data correctness directly influences diagnosis results. Equipment suffers all kinds of environment stresses, such as temperature, vibration, and electromagnetic stress. As embedded testing facility, BIT also suffers from these stresses and the interferences/faults are caused, so that the test course is influenced,resulting in incredible results. Therefore it is necessary to monitor test data and judge test failures.Stress monitor and BIT self-diagnosis would redound to BIT reliability, but the existing antijamming researches are mainly safeguard design and signal process. This paper focuses on test results monitor and BIT equipment(BITE) failure judge, and a series of improved approaches is proposed. Firstly the stress influences on components are illustrated and the effects on the diagnosis results are summarized. Secondly a composite BIT program is proposed with information integration, and a stress monitor program is given. Thirdly, based on the detailed analysis of system faults and forms of BIT results, the test sequence control method is proposed. It assists BITE failure judge and reduces error probability. Finally the validation cases prove that these approaches enhance credibility.  相似文献   

12.
The archiitecture and justification for an approach to built-in testing (BIT) in electronic circuits and systems is presented. The proposed system is capable of on-line fault detection and prediction up to the shop replaceable assembly (SRA) level and is designed to interface with external automatic test equipment (ATE) for off-line fault diagnosis within the SRA. The constituent parts of the BIT system have been extensively simulated and the approach appears to be suitable for hardware implementation both with respect to computational and economic considerations.  相似文献   

13.
Role of BIT in support system maintenance and availability   总被引:1,自引:0,他引:1  
The role of built in test (BIT) in electronic systems has grown in prominence with the advances in system complexity and concern over maintenance lifecycle costs of large systems. In an environment where standards drive system designs (and provide an avenue for focused advancement in technology), standards for BIT are very much in an evolutionary state. The reasons for advancing the effectiveness of BIT include reduced support overhead, greater, confidence in operation, and increased system availability. The cost of supporting military electronic systems (avionics, communications, and weapons systems) has driven much of the development in BIT technology. But what about the systems that support these end items that contain test and measurement instrumentation - such as automatic test equipment (ATE), simulators and avionics development suites? There has also been a beneficial effect on the maintenance and availability of these systems due to the infusion of BIT into their component assemblies. But the effect has been much more sporadic and fragmented. This paper looks at the state of BIT in test and measurement instruments, explain its affect on system readiness, and present ideas on how to improve BIT technologies and standards. This will not provide definitive answers to BIT development questions, since the factors that affect it are specific to the instrument itself. The topics covered in this paper are: definitions of built-in test, instrument BIT history, importance of BIT fault coverage and isolation in support systems, overview of BIT development process issues that limit the effectiveness of BIT Standards related to instrument BIT, making BIT more effective in support system maintenance and availability and conclusions.  相似文献   

14.
Work is ongoing at NAVAIR to understand how avionics fiber optic BIT technology can help reduce military aviation platform fiber optic network life cycle and total ownership cost. Operational availability enhancements via comprehensive supportability programs combined with keen attentiveness to reliability and maintainability metrics are driving the avionics fiber optic BIT value proposition. Avionics fiber optic BIT technology is expected to reduce failure rate and mean time to repair by predicting link failure before link failure actually occurs, running post-maintenance stress screening upon aircraft start-up, improving fault isolation by reducing the troubleshooting ambiguity zone from three to one, and reducing the need for separate support equipment for system troubleshooting  相似文献   

15.
航空电子设备机内自检的设计   总被引:2,自引:0,他引:2  
何晓薇 《航空电子技术》2002,33(4):37-39,47
介绍了机内自检设计的一般原则;给出了电子设备机内自检的具体设计方案;提出了设计中减少虚警的具体办法。  相似文献   

16.
Evaluation of built-in test   总被引:1,自引:0,他引:1  
Built-in test (BIT) provides fault finding as a means to aid in system assembly, test, and maintenance. An investigation to evaluate BIT of a particular electronics board used in the in-flight entertainment system for Boeing 777s is described. We found BIT proved useful when failure occurrences were uniquely associated with the operating environment, situations which can result in no-fault found, or could-not duplicate (CND) failures upon test. We also observed cases where the BIT failed to observe failures, and in some cases pointed to the wrong cause of failure. These and other advantages and disadvantages of BIT implementation are discussed  相似文献   

17.
如何高效而精确的检测无人机机载设备的功能与性能,越来越重要且急迫。文章提出了一种将无人机机载计算机作为自动测试系统组成部分,并利用测试资源模拟无人机机载设备输入输出信号,仿真机载设备功能的测试系统设计方法,充分发挥机载计算机本身与其他机载设备的数据交联功能,以保持测试系统与实际装备工作环境一致,使得无人机整机BIT和正常工作过程能顺利完成。通过配备不同型号无人机的机载计算机和测试附件,可完成多型号无人机的测试,有效提高了内场检测维修的能力,提升了无人机的战斗力。  相似文献   

18.
介绍了一种基于ICL8038芯片的飞行器发电机模拟源设计方法,该模拟源可模拟飞行器发动机开车时发电机和永磁机产生的交流电,且电压和频率可调,解决了飞行器在地面无须发动机开车即可对电子设备实施自检测所需的电源问题,可作为飞行器发动机启动系统和其他机载电子设备原位检测系统的电源。  相似文献   

19.
吕克洪  邱静  刘冠军 《航空学报》2008,29(4):1002-1006
 虚警率高是困扰机内测试(BIT)系统得到广泛应用的主要原因。针对该问题,从机电系统所承受时间应力的角度构建了机内测试系统综合降低虚警技术的总体模型。首先采用双支持向量机(SVM)的方法将实时应力信息与机内测试诊断结果相互关联。在此基础上,提出了基于核主元模糊聚类的虚警识别方法将机电系统多源信息进行综合分析,并通过优化决策实现多级降低机内测试系统虚警的目的。最后,针对某型直升机航空地平仪的机内测试系统进行了试验验证与分析。  相似文献   

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