Test results judgment method based on BIT faults

Built-in-test(BIT) is responsible for equipment fault detection, so the test data correctness directly influences diagnosis results. Equipment suffers all kinds of environment stresses, such as temperature, vibration, and electromagnetic stress. As embedded testing facility, BIT also suffers from these stresses and the interferences/faults are caused, so that the test course is influenced,resulting in incredible results. Therefore it is necessary to monitor test data and judge test failures.Stress monitor and BIT self-diagnosis would redound to BIT reliability, but the existing antijamming researches are mainly safeguard design and signal process. This paper focuses on test results monitor and BIT equipment(BITE) failure judge, and a series of improved approaches is proposed. Firstly the stress influences on components are illustrated and the effects on the diagnosis results are summarized. Secondly a composite BIT program is proposed with information integration, and a stress monitor program is given. Thirdly, based on the detailed analysis of system faults and forms of BIT results, the test sequence control method is proposed. It assists BITE failure judge and reduces error probability. Finally the validation cases prove that these approaches enhance credibility.     

Role of BIT in support system maintenance and availability

The role of built in test (BIT) in electronic systems has grown in prominence with the advances in system complexity and concern over maintenance lifecycle costs of large systems. In an environment where standards drive system designs (and provide an avenue for focused advancement in technology), standards for BIT are very much in an evolutionary state. The reasons for advancing the effectiveness of BIT include reduced support overhead, greater, confidence in operation, and increased system availability. The cost of supporting military electronic systems (avionics, communications, and weapons systems) has driven much of the development in BIT technology. But what about the systems that support these end items that contain test and measurement instrumentation - such as automatic test equipment (ATE), simulators and avionics development suites? There has also been a beneficial effect on the maintenance and availability of these systems due to the infusion of BIT into their component assemblies. But the effect has been much more sporadic and fragmented. This paper looks at the state of BIT in test and measurement instruments, explain its affect on system readiness, and present ideas on how to improve BIT technologies and standards. This will not provide definitive answers to BIT development questions, since the factors that affect it are specific to the instrument itself. The topics covered in this paper are: definitions of built-in test, instrument BIT history, importance of BIT fault coverage and isolation in support systems, overview of BIT development process issues that limit the effectiveness of BIT Standards related to instrument BIT, making BIT more effective in support system maintenance and availability and conclusions.     

Instrumenting embedded test software in support system integration, factory production, and depot repair

Embedded built-in test (BIT) software typically provides a system-level go/no-go indication and, in the presence of a failure, may provide some level of sub-system isolation. This level of reporting, while meeting the customer's operational requirements, does little to support system integration, production, and repair. To support these other needs, "instrumentation code" is added to the BIT software to provide detailed test data through an external interface. Since the BIT software already accesses the hardware parameters for testing, it becomes the most logical component for the instrumentation. This paper describes the techniques of embedding instrumentation during BIT design and development to support a broad range of program test needs. It explains the costs and benefits associated with the use of instrumentation. It gives specific examples of instrumented software and describes how instrumentation data can be used during environmental tests, factory test, and depot test. The impact instrumentation has on software development time, code size, execution time, and reliability is discussed as well as the cost of retrofitting BIT software to add instrumentation. Some of the benefits as well as the challenges to developing effective embedded instrumentation is also examined.     

Using built-in-test to reduce TPS run times and improve TPSreliability

This paper addresses using information derived from Built-in-Test (BIT) to fault diagnose Units Under Test (UUTs), wherever possible. This philosophic approach to diagnostic testing is not new. It has been studied over the past 20 years under the visor of “Integrated Diagnostics”, but it has yet to be truly implemented in a “real life” military diagnostic test environment. The mindset of Test Program Set design engineering, along with customer and contractor management alike, remains “complete diagnostic testing based upon single catastrophic component failure modes”. If we are to generate cost efficient Test Program Sets (TPSs) under reduced military budget constraints, this will have to change! The test engineer must be encouraged to use methodologies to speed up development time and decrease TPS run times. Using present technology, this is possible now, and as the technology matures, will become a truly viable approach in the future. For the purpose of this paper, the author relies heavily on his extensive US Navy Automatic Test Equipment (ATE) and Test Program Set (TPS) experience, as well as on previous studies performed on using BIT to fault diagnose Unit Under Test failures on US Naval Air weapon systems     

基于时间应力分析的机内测试系统综合降虚警技术

 虚警率高是困扰机内测试（BIT）系统得到广泛应用的主要原因。针对该问题,从机电系统所承受时间应力的角度构建了机内测试系统综合降低虚警技术的总体模型。首先采用双支持向量机（SVM）的方法将实时应力信息与机内测试诊断结果相互关联。在此基础上,提出了基于核主元模糊聚类的虚警识别方法将机电系统多源信息进行综合分析,并通过优化决策实现多级降低机内测试系统虚警的目的。最后,针对某型直升机航空地平仪的机内测试系统进行了试验验证与分析。     

Smart BIT: a plan for intelligent built-in test

A major factor influencing the readiness of today's highly electronics-driven weapons systems is the amount of time spent maintaining them. The attainment of a better understanding of the causes for intermittent and other ill-defined failure modes and development of a greater appreciation for the effect of both external and internal environmental factors on the fault behavior of electronic systems will help to improve the BIT (built-in test) performance. Smart BIT is the name applied to a program of research and development sponsored by Rome Air Development Center (RADC) to investigate, develop, and apply artificial-intelligence (AI) techniques to effect BIT improvement. An overview of that program, its contents and purposes is provided. Deficiencies in current BIT implementations and potential benefits of the Smart BIT program are presented. Components of this approach are discussed and supporting technology areas highlighted. The current plan for implementing this approach is given along with a scenario describing its potential form     

机载嵌入式计算机通用化BIT架构设计技术

设计开发了一种通用化BIT软件架构技术,可应用于机载嵌入式计算机。将BIT软件按照功能分为硬件驱动层、测试算法层、测试配置及控制层、应用接口层等,可极大程度实现不同硬件环境、操作系统环境下,BIT软件的可移植性,还定义了一种操作系统启动前实现硬件BIT检测的方法,可有效提高内存、CPU等硬件资源的故障检测率。     

机内测试虚警分析和控制

现代飞行器广泛采用机内测试(Built-intest,BIT)技术,以便对其内部故障进行自动检测、诊断和隔离,但是常规BIT面临诊断能力不足和诊断模糊性等问题,导致BIT虚警率高,难以有效发挥其应有的作用.本文论述了BIT虚警的基本理论、虚警的危害及现状,并从BIT虚警产生的原因分析入手,提出了解决虚警问题的一些方法和措施.     

BIT综合表示模型研究

 在分析机内测试(BIT)主要设计要素组成的基础上,提出了BIT综合表示模型。建立了BIT综合表示模型的数学定义,包括BIT单元模型、BIT层次关系集合、BIT数据传送方式集合、BIT执行次序集合和BIT综合表示模型。在数学定义的基础上,进一步建立了BIT综合表示的框图模型和表格模型,这两种模型可以直接用于工程分析。最后,以某辅助导航系统为案例,进行了BIT综合表示模型的应用,给出了框图模型结果和表格模型结果,验证了该模型的可用性和有效性。     

Flyable fiber-optic radar target generator

Airborne radar relies on Built-in-Test (BIT) for fault detection, fault isolation and system calibration. The capability of BIT is often limited by space, weight, size and cost considerations. Furthermore, the radar does not have a test target that will allow BIT to perform in flight, closed-loop functional test of the complete radar system. This paper describes a fiber-optic based radar test target unit that provides a delayed replica of the transmitted radar signal. The unit will intercept a small amount of radar-transmitted energy, delay it in the fiber, then feed it back into the radar producing a calibrated “echo” at a predetermined radar range. The unit can be installed as part of the airborne radar. The details on the design and testing of a proof-of-concept unit are also given     

商用涡扇发动机推力控制故障处置功能解析

针对运输类飞机对动力装置必须确认任何单一失效或故障及可能的失效组合都不会危及飞机安全飞行的适航要求,经工程研究和飞机运营经验证明,原有的通过安全性分析以及申请豁免来表明设计符合性的验证方法存在不足,为了保障飞机飞行的安全性,可增加推力控制故障处置(TCMA)系统。以B787飞机配装的GEnx发动机TCMA系统为研究对象,采用系统工程的方法研究和分析了该系统的安全性需求来源、符合性验证方法及其演进、TCM事件危害、TCMA系统架构和系统功能,其中包括事件侦测、处置逻辑、激活功能监控与内部自检BIT等功能。分析结果表明:TCMA系统是1个集成的智能控制系统,在TCM事件发生后无需飞机机组人员干预,能够自动处置并保障飞机的飞行安全。     

飞行控制计算机模拟接口BIT电路设计及仿真

随着航空电子设备维修性要求的提高以及设备本身要求具备检测隔离故障的能力以缩短维修时间,机内测试(BIT)在测试领域研究中将越来越重要。功能电路BIT系统是航空电子设备整机BIT系统的重要组成部分,因此从解决实际问题出发,针对飞行控制计算机中的模拟输入和输出接口电路,提出了几种BIT的设计方法,并使用Multisim软件对所设计的BIT监测电路进行仿真,仿真结果表明,所设计的BIT电路是可靠及有效的。     

Improving Avionics Fiber Optic Network Reliability & Maintainability

Work is ongoing at NAVAIR to understand how avionics fiber optic BIT technology can help reduce military aviation platform fiber optic network life cycle and total ownership cost. Operational availability enhancements via comprehensive supportability programs combined with keen attentiveness to reliability and maintainability metrics are driving the avionics fiber optic BIT value proposition. Avionics fiber optic BIT technology is expected to reduce failure rate and mean time to repair by predicting link failure before link failure actually occurs, running post-maintenance stress screening upon aircraft start-up, improving fault isolation by reducing the troubleshooting ambiguity zone from three to one, and reducing the need for separate support equipment for system troubleshooting     

An Approach to Built-In Testing

The archiitecture and justification for an approach to built-in testing (BIT) in electronic circuits and systems is presented. The proposed system is capable of on-line fault detection and prediction up to the shop replaceable assembly (SRA) level and is designed to interface with external automatic test equipment (ATE) for off-line fault diagnosis within the SRA. The constituent parts of the BIT system have been extensively simulated and the approach appears to be suitable for hardware implementation both with respect to computational and economic considerations.     

改善电子系统故障诊断能力的神经网络虚警过滤器技术

分析了现代电子系统机内测试 (BIT)技术存在的虚警问题 ,提出运用神经网络虚警过滤器(NNFAF)技术来降低虚警、改进BIT能力 ;并介绍了NNFAF的原理和网络开发方法 ;最后分析了NN FAF技术的特点、应用及发展方向。     

Failure Prediction in Electronic Systems

If impending failures in aerospace systems can be predicted deterministically during a test or checkout period, action can be taken to replace or repair the defective parts and a mission failure averted. This has the effect of increasing the mission reliability of the system. There are several methods of predicting specific failures especially adapted to electronic systems, but also applicable to electromechanical and fluid systems and components. These are classified and discussed in detail, with examples. References are cited for additional detail. By way of background, deterministic failure prediction is contrasted with statistical failure prediction. The nature and definition of failure and related concepts are also discussed, together with the physical principles upon which the several failure prediction methods are based. Used selectively and collectively, these failure prediction methods can form an optimal failure prevention strategy for use in a system test or checkout program.     

Linux下无人机软件故障注入系统研究与设计

基于linux系统的软件故障注入方法,设计了一个软件故障注入系统UAVFI_L,采用硬件覆盖和故障模型的方法,模拟无人机系统的硬件故障,并着重讨论了在总线上注入故障的试验策略。最后用一台工控机和飞控计算机通讯,注入故障。故障注入试验结果表明了这种方案的正确性和可行性。     

Built-in test maturation concepts using test program set andrelational database technologies

Continual improvement of avionic built-in test (BIT) is critical to mission readiness and capability. This paper discusses how test program set (TPS) and relational database (RDB) technologies can be used for this purpose. Important aspects for continually improving avionic BIT and TPS operation are discussed     

航空电子设备机内自检的设计

介绍了机内自检设计的一般原则;给出了电子设备机内自检的具体设计方案;提出了设计中减少虚警的具体办法。     

某型涡扇发动机控制系统传感器故障诊断研究

研究利用卡尔曼滤波器及多重故障假设检验方法来检测某发动机控制系统传感器硬、软故障,并实现故障传感器的输出重构。给出了传感器故障诊断原理及算法,针对传感器常见典型故障进行了故障诊断过程仿真。仿真结果表明,所研究的方法能及时、有效的检测到故障传感器,并对其进行隔离和重构,没有发生误报和漏报现象。