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基于嵌入式技术的B码信号中同步脉冲提取方法的研究
引用本文:范一强,曹剑中,聂浩之,刘波.基于嵌入式技术的B码信号中同步脉冲提取方法的研究[J].航空计算技术,2005,35(3):113-116.
作者姓名:范一强  曹剑中  聂浩之  刘波
作者单位:1. 中国科学院,研究生院,北京100039;中国科学院,西安光学精密机械研究所,陕西,西安,710068
2. 中国科学院,西安光学精密机械研究所,陕西,西安,710068
摘    要:首先对B码信号进行了详细地码型介绍和理论分析,然后提出了一种利用嵌入式技术来提取B码信号中同步脉冲的方法。该设计的核心部分是一片CPLD芯片,其内部实现了B码同步脉冲上升延的提取,脉冲宽度调制等功能。对设计过程中出现的关键问题,如脉冲宽度检测和毛刺信号的消除,本文提出了解决方法,并给出了仿真结果。与传统的方法相比,该设计方案具有精度高,体积小,成本低,工作稳定等优点。

关 键 词:IRIG-B码  CPLD  硬件描述语言  Verilog  HDL  VHDL
文章编号:1671-654X(2005)03-0113-04
修稿时间:2005年4月19日

Drawing of Synchronous Pulse in IRIG-B Code based on Embedded Technology
FAN Yi-qiang,CAO Jian-zhong,NIE Hao-zhi,LIU Bo.Drawing of Synchronous Pulse in IRIG-B Code based on Embedded Technology[J].Aeronautical Computer Technique,2005,35(3):113-116.
Authors:FAN Yi-qiang  CAO Jian-zhong  NIE Hao-zhi  LIU Bo
Institution:FAN Yi-qiang~
Abstract:The IRIG-B code is a kind of signal for time unification,and there are lots of time information included in it.Based on deep study on IRIG-B code,a new method that is used to draw signal of synchronous pulse based on embedded technology is presented.The core part in the design is a complex programmable logic device,in which drawing of synchronous pulse and modulation of pulse width is realized.Some key problems have appeared in the course of design,such as how to measure pulse width and remove interfering signal.To these key technologies the solutions are proposed with emulation results given.The result shows that it has lots of advantages such as higher precisions,smaller size,lower costs and the more reliable stability compared with traditional method.So this new method can Totally replace the part in traditional device.
Keywords:
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