| 基于FPGA的边界扫描测试系统的研究 |
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| 引用本文： | 李修杰.基于FPGA的边界扫描测试系统的研究[J].航空电子技术,2010,41(4):28-32. |
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| 作者姓名： | 李修杰 |
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| 作者单位： | 中国航空无线电电子研究所,上海200233 |
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| 摘 要： | 介绍了基于FPGA的边界扫描测试系统的系统组成,工作原理,以及设计方案。描述了嵌入式测试系统的软硬件设计。文章给出了系统的程序流程和数据结构。
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| 关 键 词： | FPGA JTAG控制接口 互连测试 |
A Design of Embedded Test System Based on FPGA Using Boundary Scan Technology |
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| LI Xiu-jie.A Design of Embedded Test System Based on FPGA Using Boundary Scan Technology[J].Avionics Technology,2010,41(4):28-32. |
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| Authors: | LI Xiu-jie |
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| Institution: | LI Xiu-jie (China National Aeronautical Radio Electronics Research Institute, Shanghai 200233,China) |
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| Abstract: | This paper introduces the system structure, function principle and design scheme of embedded test system based on FPGA using boundary scan technology. The design of hardware and software of embedded test system is described. The program flow and data structure are introduced in the paper in detail. |
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| Keywords: | FPGA JTAG control interface interconnection test |
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