Noise analysis of a digital tanlock loop |
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Authors: | Pomalaza-Raez C.A. |
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Affiliation: | Dept. of Electr. & Comput. Eng., Clarkson Univ., Potsdam, NY; |
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Abstract: | The noise performance analysis of a nonuniform digital phase-locked loop (DPLL), called the digital tanlock loop (DTL), is investigated by both analytic and computer-simulation methods. The results are presented in terms of phase error probability mass function and mean time to skip cycle versus input signal-to-noise ratio (SNR). These results are compared to the ones obtained with the conventional sinusoidal DPLL loop (DPLL). It is found that, for low-to-moderate input SNR, the DTL has only a slight improvement over the DPLL. The DTL, however, has larger linear characteristics than the conventional DPLL, which makes it attractive for applications that require an increased tracking range or as a first stage in carrier tracking systems based on optimum estimation procedures such as a Kalman smoother |
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