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基于FPGA的并行遗传算法硬件实现的研究
引用本文:房磊,张焕春,朱力立.基于FPGA的并行遗传算法硬件实现的研究[J].南京航空航天大学学报,2004,36(5):628-632.
作者姓名:房磊  张焕春  朱力立
作者单位:南京航空航天大学自动化学院,南京,210016
基金项目:国防基础科研基金资助项目
摘    要:遗传算法具有天然的并行性。FPGA(Field programmable gate arrays)本质上的并行特性使其很适合用于实现并行的遗传算法。结合两者的并行特性,本文提出了一种基于FPGA的并行遗传算法。选用了适合硬件实现的选择、交叉、变异算子,并将它们设计成流水线结构。整个设计采用了XILINX公司的XC2V1000型号FPGA芯片。算法利用VHDL语言来描述。实现后的测试表明,这种硬件遗传算法有效减少了运行时间,使其在一些实时性要求较高的场合得到很好应用。

关 键 词:遗传算法  并行  现场可编程门阵列  VHDL
文章编号:1005-2615(2004)05-0628-05
修稿时间:2003年10月27

Research on FPGA-Based Parallel Genetic Algorithms
FANG Lei,ZHANG Huan-chun,ZHU Li-li.Research on FPGA-Based Parallel Genetic Algorithms[J].Journal of Nanjing University of Aeronautics & Astronautics,2004,36(5):628-632.
Authors:FANG Lei  ZHANG Huan-chun  ZHU Li-li
Abstract:Genetic algorithms (GAs) have the inherently parallel characteristic. The capability for parallelization of f ield programmable gate arrays (FPGA) makes it be excellent candidate for impleme nting the parallel GA. Combining the parallel characteristic of them together, a FPGA-based parallel genetic algorithm is proposed. The selection, crossover an d mutation operators suitable for the hardware implement are designed as a pipel ining architecture. The hardware GA processor is implemented in XILINX FPGA XC2V 1000. The VHDL language is used to describe the whole algorithm. Experimental re sults indicate that the hardware-based parallel genetic algorithm can efficient ly reduce the run time. It can be applied in real-time system applications.
Keywords:genetic algorithms  parallel  field programmable gate  arrays (FPGA)  VHDL
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