| CCSDS中LDPC码编码器的FPGA设计与实现 |
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| 作者姓名： | 孙钰林 吴增印 王菊花 |
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| 作者单位： | 中国空间技术研究院西安分院; |
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| 摘 要： | CCSDS标准推荐了一组适用于深空通信的LDPC码。为了满足在一个系统中使用多种码率LDPC码的需要,设计了一个能够实现标准中4种码率码编码的通用编码器,该编码器合理安排了生成矩阵存储单元,充分复用了硬件资源,用一种码编码需要的资源消耗实现了4种码的编码,大大节省了资源;用VHDL语言在FPGA上实现了该编码器,通过仿真验证,表明该编码器在占用硬件资源不大的条件下,能够正确完成4种码率码的编码。
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| 关 键 词： | CCSDS LDPC 通用编码器 多码率 FPGA实现 |
FPGA Design and Implement of LDPC Code Encoder in CCSDS |
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| Authors: | SUN Yu-lin WU Zeng-yin WANG Ju-hua Xi'an China |
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| Institution: | SUN Yu-lin,WU Zeng-yin,WANG Ju-hua(China Academy of Space Technology(Xi'an),Xi'an 710000,China) |
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| Abstract: | A class of low-density parity-check(LDPC)codes is recommended by CCSDS for application in deep space communication.To meet the requirement of using multi-rate LDPC codes in one space communication system,a general encoder that can implement 4 coding rates LDPC codes in CCSDS was designed.This encoder can save resource through arranging the storage reasonably and multiplexing the hardware resources completely.The encoder was implemented on FPGA,using VHDL language,and simulation results verify that it can re... |
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| Keywords: | CCSDS LDPC General encoder Multi-rate FPGA implement |
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