| 基于FPGA的多通道数字接收机设计与实现 |
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| 引用本文： | 杨媛媛,吕幼新.基于FPGA的多通道数字接收机设计与实现[J].航天电子对抗,2011,27(5):32-34,64. |
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| 作者姓名： | 杨媛媛 吕幼新 |
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| 作者单位： | 电子科技大学电子工程学院,四川成都,611731 |
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| 摘 要： | 针对多通道数字接收机在雷达和移动通信等领域的应用需求,提出了一种基于FPGA的4通道数字接收机的实现方案。采用4个AD9230芯片对射频模拟信号进行并行数字化处理,然后在FPGA中实现数字下变频和整个系统的配置;通过对积分梳状滤波器（CIC）和半带（HB）滤波器的级数和选通控制,实现覆盖范围为1～16384倍的抽取滤波...
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| 关 键 词： | 数字下变频 多通道数字接收机 抽取 滤波 |
Design and implement of multichannel digital receiver based on FPGA |
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| Institution: | Yang Yuanyuan,Lü Youxin(School of Electronic Engineering,University of Electronic Science and Technology of China,Chengdu 611731,Sichuan,China) |
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| Abstract: | Aiming at the requirement of multichannel digital receiver in the fields of radar,mobile telecommumication and so on,a scheme of realizing four-channel digital receiver based on FPGA is put forward.Four AD9230 are used to digitize analog signals,and then digital down conversion(DDC) and configuration of system are implemented in the FPGA.The decimation filter range increases by a factor of 1-16384,that is realized by controlling the stage and application for cascaded integrator-comb(CIC)filter and half-band... |
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| Keywords: | digital down conversion multichannel digital receiver decimation filter |
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