| 片上总线型PowerPC系统控制器的FPGA设计 |
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| 引用本文： | 王经典,陆伊,李修杰,王科. 片上总线型PowerPC系统控制器的FPGA设计[J]. 航空电子技术, 2009, 40(3): 24-28 |
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| 作者姓名： | 王经典 陆伊 李修杰 王科 |
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| 作者单位： | 中国航空无线电电子研究所,上海,200233;中国航空无线电电子研究所,上海,200233;中国航空无线电电子研究所,上海,200233;中国航空无线电电子研究所,上海,200233 |
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| 摘 要： | 介绍了PowerPC系统控制器两种结构中IP互连和复用的优缺点，分析了片上总线型系统控制器的各子模块结构，采用硬件描述语言（HDL）描述该控制器功能，并采用Modelsim进行仿真，最后进行了FPGA原型验证。验证结果表明，采用片上总线结构的系统控制器不仅能实现预期功能，还解决了IP互连问题，提高了IP的可复用性。
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| 关 键 词： | PB总线 DMA控制器 SDRAM控制器 异步存储器控制器 UART控制器 |
FPGA Implementation of On-chip Bus Structured System Controller for PowerPC |
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| WANG Jing-dian,LU Yi,LI Xiu-jie,WANG Ke. FPGA Implementation of On-chip Bus Structured System Controller for PowerPC[J]. Avionics Technology, 2009, 40(3): 24-28 |
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| Authors: | WANG Jing-dian LU Yi LI Xiu-jie WANG Ke |
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| Affiliation: | (China National Aeronautical Radio Electronics Research Institute, Shanghai 200233, China) |
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| Abstract: | In terms of IP interconnect and reusability, this paper introduced the characteristics of two kinds of structures of system controller for PowerPC, and it analyzed the sub-modules in on-chip bus structured system controller and described the functions with HDL. It carried out simulation with modelsim and finally prototyped with FPGA. These results show that, with on-chip bus, system controller can achieve the desired functions, simplify the IP interconnect, and improve the IP reusability. |
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| Keywords: | PB bus DMA controller SDRAM controller device controller UART controller |
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