RF低噪音放大器的仿真设计方法

探讨了使用惠普公司的微波电路仿真软件EESOF/Libra设计射频集成电路(RFIC)接收端的低噪音放大器(LNA)的方法.设计采用惠普砷化稼场效应管(HP ATF-21186).由于ATF-21186的稳定性欠佳,且放大器的整体增益在33?dB以上,噪声系数小于2,输入、输出驻波系数小于2,因此对如何提高电路的稳定性、降低噪声系数及具有较好的输入输出匹配特性进行了研究.设计过程首先从等效集总元件电路模型设计入手,然后使用平面结构实现各集总元件以便易于集成.经过EESOF的整体仿真,表明该方法正确有效.

Designing Simulation of RF Low Noise Amplifier

A design approach of low noise amplifiers (LNA), which are employed in the receiving terminals of radio frequency integrated circuits (RFIC), based on HP's EESOF simulation software is studied. In this design example, a HP's GaAs FET (HP ATF21186) is applied. The required satisfactions are: entire gain of LNA should be larger than 33dB, noise figure should be less than 2.0, and input and output standing wave should be smaller than 2.0. Since the stability of ATF 21186 is not good enough and also the above design satisfactions must be required, the study is focused on an optimized design scheme to obtain a high stability, lower noise figure and better input/output matching. The design is done first in a equivalent lumped circuit model and then all lumped elements are implemented by planer circuit, which is required by integrated circuit. The simulation results of EESOF software show that the approach in this paper is accurate and efficient.