软件无线电中的高速设计技术

介绍了高速电路的定义以及在高速电路设计中存在的信号完整性、时序问题,详细分析了产生这些问题的原因.分析了高速电路设计中消除反射常用的端接方式,并给出了串行端接和并行端接的仿真结果.结合实际应用,从工程实现的角度提出合理的连线拓朴结构并给出了实测结果.最后分析了高速电路设计中时序问题,给出了源同步时钟系统中时序设计应该满足的条件. 

High-speed circuit design in software radio

The definition of high-speed circuit design as well as the signal integrity and timing problems in this design was introduced. The usual termination methods to remove reflection in high-speed circuit design were analyzed, and the simulation result of serial termination and parallel termination were compared in details. From the view of engineering and with connection to practical application, reasonable connection topological structures were proposed, and the experiment data were also provided. Finally the timing problems in high-speed circuit design were analyzed and the conditions of timing design in source synchron ous clock system were derived.