一种高效数字上变频器及其FPGA实现

数字上变频是软件无线电的关键技术之一。文章首先介绍了数字上变频器的基本原理和组成结构,并对其核心部件之一的CIC滤波器进行了改进,提出了一种能实现任意整数倍内插的高效完全非递归结构,并在ModelSim下进行了仿真。最后,在QuartusII下对使用该结构Sharpened CIC滤波器的数字上变频器系统进行了综合与仿真。

An Efficient Digital Up Converter for FPGA Application

Digital Up Converter(DUC) is one of the key techniques in software defined radio(SDR).An efficient structure for Sharpened Cascaded Integrator Comb(SCIC) which is the main component of DUC is presented in this paper.The main novelty of this structure is that it can be easily implemented by using filed programmable gate array(FPGA).The non-recursive form can be achieved for any interpolation factor with quite low complexity and great flexibility.The simulation result of this structure is presented using ModelSim and the DUC system with SCIC of this structure is synthesized and simulated using QuartusII.