Digital Oscillator Having Low Sensitivity and Roundoff Errors

A digital oscillator structure is proposed which has very low sensitivity and roundoff errors, particularly for low frequencies. The oscillator coefficient implemented is a normalized scaled value of the two's complement of the original coefficient, such that all bits represented are significant. The signal is scaled where appropriate to keep the overall transfer function unchanged. Multipliers used in the proposed structure have the same width as that in the direct form digital oscillator, although the performance is significantly improved.