| 轰炸雷达计算机系统设计 |
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| 引用本文： | 黄韬. 轰炸雷达计算机系统设计[J]. 航空计算技术, 2000, 30(3): 36-38 |
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| 作者姓名： | 黄韬 |
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| 作者单位： | 中国航空计算技术研究所陕西西安 710068 |
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| 摘 要： | 轰炸雷达的核心是雷达计算机系统,既要具有很强的实时处理能力,又要具有高可靠性.本文从工程设计角度出发,详细介绍了轰炸雷达计算机系统的硬件设计.
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| 关 键 词： | 轰炸雷达计算机 航空电子系统 FPGA |
| 修稿时间： | 2000-05-26 |
Design of Bombing Radar Computer System |
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| HUANG Tao. Design of Bombing Radar Computer System[J]. Aeronautical Computer Technique, 2000, 30(3): 36-38 |
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| Authors: | HUANG Tao |
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| Abstract: | The core of bombing radar is computer.It needs not only powerful real-time processing ability but also high reliability.This paper starts with engineering and introduces how to design bombing radar computer system. |
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| Keywords: | bombing radar computer avionics system FPGA |
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