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基于NiosII的SoPC系统在时统系统中的应用开发
引用本文:吕桂华,刘锋,李和战,龚光林,何海英,田小平.基于NiosII的SoPC系统在时统系统中的应用开发[J].飞行器测控学报,2006,25(6):86-90.
作者姓名:吕桂华  刘锋  李和战  龚光林  何海英  田小平
作者单位:北京跟踪与通信技术研究所 北京.100094
摘    要:N iosII处理器是一种用户可随时配置和构建的32位指令集和数据通道的嵌入式系统微处理器IP核,与传统的8/16位系统相比,无论处理器的结构还是开发手段上都发生了较大变化。本文主要介绍了N iosII的性能特点和基于N iosII的SoPC系统的功能构架,给出了基于N iosII处理器的SoPC系统在时统系统中的一种应用方案。其中重点介绍了该方案的SoPC系统设计实现和软件设计实现。

关 键 词:NiosII处理器  SoPC系统  FPGA  时统系统
收稿时间:2006-06-01
修稿时间:2006-07-11

SoPC System Application Development in Timing System Based on NiosII
LV Gui-hua ,LIU Feng ,LI He-zhan ,GONG Guang-lin, HE Hai-ying ,TIAN Xiao-ping.SoPC System Application Development in Timing System Based on NiosII[J].Journal of Spacecraft TT&C Technology,2006,25(6):86-90.
Authors:LV Gui-hua  LIU Feng  LI He-zhan  GONG Guang-lin  HE Hai-ying  TIAN Xiao-ping
Institution:Beijing Institute of Tracking and Telecommunications Technology, Beijing 100094
Abstract:NiosII processor is an embedded system microprocessor IP kernel with 32 bits instruction set and data channel,which can be created and configurated according to the design requirements.Compared with traditional 8/16 bits systems,NiosII processor is different from them in architecture and development method.This paper introduces NiosII processor's features and the function architecture of SoPC system based on NiosII processor,and provides an SoPC system application plan in timing system,putting the emphasis on the SoPC system design and the software design of the application plan.
Keywords:NiosII Processor  System on a Programmable Chip(SoPC) System  FPGA  Timing System
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