FDSOI背偏与体硅体偏电路的功耗性能对比

针对功耗和工作频率对22 nm FDSOI背偏和28 nm体硅体偏电路的偏置能力进行对比和分析。以带有4级分频电路的65级环阵（RO）为例进行后仿真，后仿真结果表明，利用背偏技术的22 nm FDSOI环阵的输出频率可在57.8~206 MHz的范围内进行调节，相应的工作电流变化范围为24.4~90.4 μA；而利用体偏技术的28 nm体硅环阵的输出频率调节范围则为92.8~127 MHz，对应的工作电流变化范围为67.8~129 μA。对22 nm FDSOI工艺的环阵进行了实测，实测结果与仿真结果一致。分析认为，在功耗和性能2个方面，22 nm FDSOI电路的背偏调节能力优于28 nm体硅电路的体偏调节能力。

Comparison of power consumption and circuit performance between back bias in FDSOI and body bias in bulk silicon

In this paper, the body bias circuit in 28 nm bulk and the back bias circuit in 22 nm FDSOI are analyzed and compared from two aspects:power consumption and circuit performance. Taking a 65-stage ring oscillator (RO) with 4-level frequency divider as an example, post simulation was conducted. The simulatior results show that, for 22 nm FDSOI RO using the back bias technology, the output frequency can be adjusted from 57.8 MHz to 206 MHz, with the corresponding operating current varing from 24.4 μA to 90.4 μA, while for 28 nm bulk silicon RO using the body bias technology, the output frequency can be modulated from 92.8 MHz to 127 MHz, with the corresponding operating current varing from 67.8 μA to 129 μA. The 22 nm FDSOI process RO was measured and the measured results are consistent with the simulation results. Therefore, from the view of both power consumption and performance, the adjustment ability of 22 nm FDSOI circuits with back bias is much more efficient than that of 28 nm bulk circuits with body bias.