面向空间应用的双核容错微处理器的研究与实现

介绍了用双核微处理器实现的容错微处理器系统SPARC—V8FIS。该系统由两个同构微处理器与支持容错操作的容错管理模块组成。微处理器是基于SPRARCV8规范的32-bit微处理器。容错管理模块提供了错误检测、诊断、从“软故障”中故障恢复，以及当发生“硬故障”时，将系统配置成单一处理器继续执行的机制，以适应空间复杂环境应用。SPARC—V8FIS用较少的硬件实现了所有容错操作，以很低的性能损失达到了很高的系统可靠性。

The Fault Tolerant System Duplicated Core Processor for Space Application

This paper describes the architecture and implement of the specific processor, SPARC_ V817PS, designed for fault tolerant system. The SPARC_ V8FTS integrates duplicate core processor and the Fault-tolerant manager. The core processor is 32- bit micro processor based on the SPARC V8 specification. The Fault-tolerant manager provides the mechanism of error detection, error diagnosis, error recovery from a transient fault, and reconfiguration that makes the SPARC_ V8FTS to a single processor sys- tem to rtm continuously when a permanent fault takes place. SPARC_ V8FTS drastically reduces the hardware count of a system, and performs all the fault tolerant operations. It provides high system reliability with low performance overhead.