基于总线功能模型的全系统FPGA验证环境设计

为了解决发动机控制领域中可编程门阵列设计复杂性日益增长而导致的验证困难问题,提出了1种FPGA的全系统验证方案,用以实现全面高效的功能验证。根据控制系统设计方案,对照控制器电路结构进行验证平台的搭建,通过基于总线功能模型的方法对系统中FPGA所控制的外设进行建模,并在验证平台中进行与电路完全一致的连接。按照系统测试计划编制测试用例对全系统进行模拟仿真。测试结果表明:全系统FPGA的验证能够模拟控制器实际运行状态,提升了验证层次与效率,对发动机数控系统的设计质量提升有显著作用。

Design of FPGA Full-System Verification Environment Based on Bus Functional Model

In order to deal with the growing difficulty in verification caused by the increasing complexity of Field Programmable Gate Array(FPGA) design in the field of engine control, a system-wide FPGA verification scheme to achieve comprehensive and efficient functional verification was presented. According to the design of the control system, the verification platform was built in accordance with the circuit structure of the controller. Based on the bus function model, the peripherals controlled by FPGA in the system were modeled, and connected with the circuit in full accord in the verification platform. Based on the system test plan, test cases were developed for the whole system simulation. The test results show that the system-wide FPGA verification can simulate the actual running state of the controller, enhance the level and efficiency of verification, and have significant effect on improving the design quality of the engine control systems.