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基于两级应力隔离的MEMS加速度计封装设计
引用本文:鞠莉娜,周铭,黄艳辉,李杰,凤瑞. 基于两级应力隔离的MEMS加速度计封装设计[J]. 导航定位与授时, 2021, 8(2): 144-150. DOI: 10.19306/j.cnki.2095-8110.2021.02.019
作者姓名:鞠莉娜  周铭  黄艳辉  李杰  凤瑞
作者单位:华东光电集成器件研究所,苏州215010
基金项目:国家科技重大专项(2018ZX01012101-006)
摘    要:封装应力是影响MEMS加速度计性能尤其是温度特性的关键因素之一.为降低封装应力,提出了一种两级应力隔离的低应力封装设计,包含芯片级应力隔离和封装级应力缓冲.采用有限元仿真模拟了四种封装设计和四种粘片方式.仿真结果表明,芯片级应力隔离比封装级应力缓冲效果更好,采用两级应力隔离可以将敏感电容的温度特性改善8倍,且四点胶粘片...

关 键 词:MEMS加速度计  封装应力  应力隔离

Package Design of MEMS Accelerometer Based on Two-stage Stress Isolation
JU Li-n,ZHOU Ming,HUANG Yan-hui,LI Jie,FENG Rui. Package Design of MEMS Accelerometer Based on Two-stage Stress Isolation[J]. Navigation Positioning & Timing, 2021, 8(2): 144-150. DOI: 10.19306/j.cnki.2095-8110.2021.02.019
Authors:JU Li-n  ZHOU Ming  HUANG Yan-hui  LI Jie  FENG Rui
Affiliation:East China Institute of Photo-Electronic IC, Suzhou 215010, China
Abstract:Package stress is one of the key factors that affect the performance of MEMS accelerometer,especially the temperature characteristic.In order to reduce package stress,a low stress package design with two-stage stress isolation is proposed,which contains chip-level stress isolation and package-level stress buffer.Four package designs and four bonding methods are simulated by finite element analysis.Simulation results show that the chip-level stress isolation is better than the package-level stress buffer.Using two-stage stress isolation can improve the sensing capacitor s temperature characteristic by 8 times,and the die attach with four dots is the best.Furthermore,process and parameters of the four-dot dispensing are optimized by experiment.Experimental results show that the mean bias temperature coefficient of 95 accelerometers designed with low stress package decreases from 1450×10-6g/℃to 243×10-6g/℃,and the mean bias stability and bias repeatability are 92×10-6g and 45×10-6g,respectively.
Keywords:MEMS accelerometer   Package stress   Stress isolation
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