| 虚拟高速数据信号发生器的硬件实现 |
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| 作者姓名： | 黄智刚 柳重堪 |
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| 作者单位： | 北京航空航天大学电子工程系 北京100083
(黄智刚)，北京航空航天大学电子工程系 北京100083(柳重堪) |
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| 摘 要： | 该虚拟高速数据信号发生器采用计算机高速总线、先入先出 (FIFO)技术以及高速D/ A的方案 ,重点解决这类虚拟仪器普遍存在的数据传输和转换速度不高的问题。对关键技术进行了重点阐述 ,从硬件上为虚拟高频信号发生器的实现创造了可行与可靠的基础
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| 关 键 词： | 虚拟仪器 信号发生器 高速总线 FIFO 数模转换 |
Hardware Realization of Virtual High Speed Data Signal Generator |
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| Authors: | Huang Zhigang Liu Zhongkan |
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| Institution: | Huang Zhigang Liu Zhongkan |
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| Abstract: | The project with the high speed bus in computer,first in first out(FIFO)technology and high speed D/A have been introduced to solve the low speed problem of data transmission and conversion in virtual instrument.The key technology has been emphasized.The feasible and reliable basis has been established in hardware to realize the virtual high frequency signal generator. |
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| Keywords: | Virtual instrument Signal generator High speed bus FIFO D/A conversion |
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