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采用主流FPGA的数字电路在线生长进化方法
引用本文:姚睿,于盛林,王友仁,高桂军,张砦.采用主流FPGA的数字电路在线生长进化方法[J].南京航空航天大学学报,2007,39(5):582-587.
作者姓名:姚睿  于盛林  王友仁  高桂军  张砦
作者单位:南京航空航天大学自动化学院,南京,210016
摘    要:采用主流FPGA器件构建了在线进化平台,提出了一种适合较大规模数字电路在线进化的生长进化方法。该方法模拟植物生长机理进化以解决进化速度缓慢问题,采用增长验证评估方法取代传统的穷举式验证评估方法来解决在线验证评估难题;应用免疫遗传算法克服遗传算法的早熟收敛问题;采用多参数级联十进制整数编码方法缩短染色体长度;采用生长进化方法成功地进化出了16位加法器和8位乘法器。对比实验结果表明,采用生长进化方法无论是进化出的电路规模,还是进化速度均优于传统的直接进化方法。

关 键 词:进化硬件  生长进化  数字电路  在线验证评估  免疫遗传算法
文章编号:1005-2615(2007)05-0582-06
修稿时间:2006-08-03

Online Growing Evolution and Evaluation Approach Based on Mainstream FPGA
Yao Rui,Yu Shenglin,Wang Youren,Gao Guijun,Zhang Zhai.Online Growing Evolution and Evaluation Approach Based on Mainstream FPGA[J].Journal of Nanjing University of Aeronautics & Astronautics,2007,39(5):582-587.
Authors:Yao Rui  Yu Shenglin  Wang Youren  Gao Guijun  Zhang Zhai
Abstract:Aimied at the difficulty of evolving complex circuits and systems,a growing evolutionary approach suitable for online evolution is proposed based on mainstream FPGA online evolution platform.The evolution approach for simulating the process of the plant growth unties the circuit scalability.Meanwhile,in order to solve the online evaluation problem,an incremental evaluation approach is used to substitute for the conventional exhaustive evaluation method,thus enhancing the evolution speed greatly.Furthermore,the immune genetic algorithm is used to avoid the premature convergence of the genetic algorithm,and the multi-parameter cascading decimal coding is used to reduce the chromosome length.The circuits of 16-bit adder and 8-bit multiplier are successfully evolved.Results show that the growing approach is more effective than directly evolving method,whether on the electric circuit scale or at the evolution speed.
Keywords:evolvable hardware  growing evolution  digital circuit  online validation and evaluation  immune genetic algorithm
本文献已被 CNKI 维普 万方数据 等数据库收录!
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