Design of high-efficiency series-resonant converters aboveresonance

Power losses in series-resonant converters (SRCs) operated above resonance are examined for the purpose of developing design guidelines leading to SRC designs with the highest possible operating efficiencies. Loss expressions are formulated and analyzed as functions of normalized voltage conversion ratio M and normalized output current J for the controlled transistor switches, antiparallel diodes, bridge diodes, and resonant capacitor. Overall losses range from a low of nearly 9% to a maximum of about 17%. Operating efficiencies corresponding to these losses range from a high of 92% to a low of 85%. Operation at the maximum efficiency of 92% occurs at values of M close to unity and is not highly dependent on J. However, in a practical closed-loop regulated SRC, operation with M too close to unity could provide an insufficient design margin, given component tolerances or other variations     

Novel single-stage half-bridge series-resonant buck-boost inverter

A novel single-stage half-bridge series-resonant buck-boost inverter (HB-SRBBI) is proposed. The main attribute of the novel inverter topology is the fact that it generates an ac output voltage larger or lower than the dc input one, depending on the instantaneous duty cycle. This property is not found in the classical voltage source inverter (VST), which produces an ac output instantaneous voltage always lower than the dc input voltage. The proposed inverter circuit topology provides the main switch for turn-on at zero-current-switching (ZCS) by an auxiliary resonant cell built before the output choke. A state-space averaging approach is employed to analyze the system. A design example of 500 W ac/dc inverter is examined to assess the inverter performance and it provides high power efficiency above 90.7% under the rated power.     

Implementation of a three-phase high-power-factor rectifier with NPC topology

A three-phase four-wire power factor corrector based on neutral-point-clamped (NPC) topology is adopted to reduce the current harmonics and increase the input power factor. Using the NPC topology, the voltage stress of power switches can be reduced to the half of the dc-link voltage. With the dc-link voltage controller and the phase locked loop circuit, the balanced and sinusoidal line currents can be drawn from the ac supply system under the balance and unbalance mains voltages. The hysteresis current comparators are adopted in the current control loop to track the line current commands. Three voltage levels are generated on the ac terminal to the neutral point. Simulations and experiments are provided to verify the validity and the effectiveness of the proposed control scheme.     

Novel hybrid 12-pulse boost-type rectifier with controlled output voltage

Novel hybrid 12-pulse line interphase transformer (LIT) rectifier systems with integrated single-switch or two-switch boost-type output stage that ensure a constant output voltage independent of mains and load conditions are proposed for supplying actuators of future more electric aircraft. The principle of operation, the dimensioning, and the system control are discussed. The theoretical considerations are experimentally confirmed for a 10 kW laboratory prototype. Finally, the single-and the two-switch system are comparatively evaluated concerning the level of input current ripple, power factor, and overall efficiency.     

Sensorless synchronous reluctance drive with standstill starting

This paper presents a novel sensorless synchronous reluctance drive system. Based on the dynamic model of the synchronous reluctance motor (SRM), a new rotor position estimator is proposed. This estimator is only related to the rate change of the stator currents. It is not related to the parameters, speed, voltage, and external load of the motor. As a result, the estimator is simple and robust. Based on the proposed estimator, a sensorless synchronous reluctance drive has been implemented. This drive system can start from standstill and accelerate to a rated speed; the traditional open-loop starting method, therefore, is unnecessary. A digital signal processor, TMS-320-C30, is used to implement the estimating and control algorithms. Experimental results show that the proposed system works well. The adjustable speed range can be from 1 r/min to 1800 r/min. Moreover, by adding the position-loop controller the proposed system can perform as a position control drive as well. Several experimental results validate the theoretical analysis.     

Novel single-switch converter with power factor correction

A new single-stage single-switch power factor correction converter with output electrical isolation is presented. The configuration of this converter is achieved by combining a flyback circuit and a forward circuit in one power stage. The principle of operation and steady-state analysis of the proposed topology is given. Based on its steady-state operation constraints, a design procedure along with a specific design example is reported. To verify the theoretical analysis of the proposed converter, a design example is given with its PSPICE simulation and experimental results     

ZCS-PWM boost rectifier with high power factor and low conduction losses

A new single-phase high power factor rectifier is proposed, which features regulation by conventional pulsewidth modulation (PWM), soft commutation, and instantaneous average line current control. A new zero-current-switching PWM (ZCS-PWM) auxiliary circuit is configured in the presented ZCS-PWM rectifier to perform ZCS in the switches and zero-voltage-switching (ZVS) in the diodes. Furthermore, soft commutation of the main switch is achieved without additional current stress by the presented ZCS-PWM auxiliary circuit. A significant reduction in the conduction losses is achieved, since the circulating current for the soft switching flows only through the auxiliary circuit and a minimum number of switching devices are involved in the circulating current path and the proposed rectifier uses a single converter instead of the conventional configuration composed of a four-diode front-end rectifier followed by a boost converter. Seven transition states for describing the behavior of the ZCS-PWM rectifier in one switching period are described. The PWM switch model is used to predict the system performance. A prototype rated at 1 kW, operating 60 kHz, with an input ac voltage of 220 V/sub rms/ and an output voltage 400 V/sub dc/ has been implemented in laboratory. An efficiency of 97.2% and power factor near 0.99 has been measured. The analysis and design of the control circuitry are also presented.     

Soft-switching single-stage AC-to-DC converter with low harmonic distortion

A 1 /spl phi/ high-frequency (HF) transformer isolated, soft-switching single-stage ac-dc converter with low line-current harmonic distortion is presented. Its operation is explained with equivalent circuits for the various intervals. The converter is analyzed and design curves are obtained. An optimization parameter is introduced and a systematic design procedure is illustrated with a design example. Detailed SPICE simulation and experimental results of a 500 W converter with load as well as line voltage variation are given to verify theory. The proposed converter employs a zero-voltage transition (ZVT) network to ensure zero-voltage switching (ZVS) at all loads, and natural power factor correction is ensured using a simple control circuit.     

Interleaved boost converter with zero diode reverse-recovery loss

A three-phase interleaved continuous-inductor-current-mode (CICM) boost converter with zero diode reverse-recovery loss is proposed. In the converter, the di/dt of the output rectifiers is controlled by an integrated magnetic component. All the output rectifiers can be turned off softly and a very high efficiency is obtained. The equivalent-circuit model of the integrated inductors, the operation principle of the converter, and the design issues are discussed. Simulation and experimental results are presented.     

Analysis of a parallel resonant converter with secondary-sideresonance

A high-frequency (HF) link parallel resonant DC/DC converter operating in the lagging power factor mode with the resonating capacitor on the secondary side of the HF transformer is analyzed using a state-space approach. Closed-form solutions (except for the duration of diode conduction) are obtained for steady-state conditions, and design curves are obtained. A method of obtaining optimum operating point under certain constraints is developed and is used as the basis of a simple design procedure. A theoretical study comparing the performance of three MOSFET-based 1-kW converters with different transformer turn ratios under load changes from rated-load to 10% load is carried out. Experimental results obtained with these converters with different transformer turn ratios are also presented     

LLC parallel resonant converter design by scaling the LC converter

An efficient and practical method for steady-state design of an LLC-type parallel resonant dc/dc converter (LLC-PRC) is presented. In general, the output characteristic curves of LLC-PRC can be obtained by multiplying the output curves of the LC-type parallel resonant converter (LC-PRC) by a ratio of the parallel and series inductances. The peak voltage and current stresses on the resonant elements also depend on the same ratio. The LLC-PRC with a filter inductor is examined for two conduction modes, continuous and discontinuous capacitor voltage conduction modes, to show the effect of the inductance ratio. A means to use the derived equations to obtain the zero current switching (ZCS) is given. Also, a design procedure, along with design examples, is given to illustrate the use of the equations and characteristic curves. An experimental LLC-PRC is built to ensure the validity of the equations and design examples     

Buck-flyback DC-DC converter

It is difficult to obtain a large input/output voltage ratio with a DC-DC converter, because the duty factor d may not reach very small values. For the same reason, it is difficult to obtain an output voltage that is adjustable in a large range. A DC-DC converter circuit is proposed that overcomes this limitation by performing a voltage ratio d²/(1-d) in the best operating mode. Circuit operation is analyzed, operating modes are evidenced, and the voltage ratio is deduced in each operating mode as a function of output current, duty factor, and circuit component values. Boundary conditions between different operating modes are obtained; consequently, it is concluded that these conditions do not occur for some operating modes. Component ratings are summarized, to facilitate circuit design. The buck-flyback DC-DC converter is very suitable for low-voltage (e.g. computer) power supplies and for power supplies with the output voltage (adjustable in a large range) supplied from the mains without a mains voltage transformer     

Comments, with reply, on `Parallel resonant converter with LLC-typecommutation'

In a recent paper by C.Q. Lee et al. (ibid., vol.25, no.6, p. 844-7, Nov. 1989), the authors analyzed a DC-DC converter that they termed the LLC-type PRC (parallel resonant converter). Its resonant network contains three active components-two inductances and a parallel capacitance-and as a consequence the converter might be expected to have third-order dynamics. But Lee et al. employed a matrix transformation to show that the behavior of the circuit may be represented as a state-plane trajectory, as for a second-order circuit. The purpose of this contribution is to show that the converter has a zero-frequency eigenvalue, associated with undesirable circulating DC. The second-order dynamics exhibited by the third-order converter are explained by an application of Thevenin's theorem. Some aerospace applications of the LLC-type parallel resonant converter (PRC) are discussed. In their reply, the authors show that the circulating direct current does not exist in the practical converter circuit     

PWM full-bridge converter with natural input power factor correction

A pulsewidth modulated (PWM) full-bridge converter that simultaneously performs input power factor correction (PFC) and DC-DC conversion is proposed. The converter is the same as the standard voltage-fed PWM full-bridge converter with a diode-bridge low-pass filter front end, but with a slight modification that results in an improvement in power factor that is sufficient to satisfy the EN61000-3-2 requirements for electrical equipment. The operation of the converter is explained and analyzed, and the results of the analysis are used to determine the converter's steady-state characteristics, which are discussed in detail. A design procedure for the selection of components is then derived and demonstrated with an example. The feasibility of the converter and its ability to satisfy EN61000-3-2 requirements on electrical equipment is shown with results obtained from an experimental prototype.     

A 10 kW DC-DC converter using IGBTs with active snubbers

This full bridge DC-DC converter employs zero voltage switching (ZVS) on one leg and zero current switching (ZCS) on the other. This technique produces exceptionally low insulated-gate bipolar transistor (IGBT) switching losses through the use of an active snubber that recycles energy back to the source. Experimental results are presented for a 10-kW, 20-kHz converter     

Phase modulated DGPS transmitter implemented with a clamped-mode resonant converter

A clamped-mode resonant converter (CMRC) is proposed to be used as a transmitter which broadcasts correction signals in a differential Global Positioning System (DGPS). The digital information of the DGPS modulates the carrier with different modulation methods minimum shift keying (MSK) (recommended for the marine radiobeacon band), stepped binary phase shift keying (S-BPSK) and BPSK. The first two methods allow keeping the converter's operation in soft switching mode. Extensive trials under impedance mismatch and modulation conditions confirm that the soft switching mode is preserved.     

PWM converter with low stresses and zero capacitive turn-on losses

A buck converter operating at constant switching frequency, whose active switches and recovery diode commutate at zero-voltage-switching (ZVS), with zero capacitive turn-on losses, is proposed. By using the parasitic capacitances of the switches as resonant capacitors, multiresonance is created. The resonant stage takes place only after the resonant inductor has been discharged, thus avoiding a resonant current peak; the devices are subjected to the same stresses as their counterparts in conventional hard-switching converters. A high efficiency is obtained.     

Capacitive-loaded push-pull parallel-resonant converter

Results of a theoretical and experimental investigation of a capacitive-loaded push-pull parallel-resonant DC-DC converter (CL-PPRC) are presented and discussed. The push-pull parallel-resonant converter (PPRC) is driven by a lower-than-resonance frequency and the secondary voltage is rectified and smoothed by a capacitive filter. The CL-PPRC is shown to operate in the zero voltage switching (ZVS) mode with a boost-like DC transfer ratio that is approximately linear with the period of the switching frequency. Experimental results of a 180 W, high output voltage (1.8 KV) prototype are found to be in good agreement with the analysis, models, and simulation results presented. The basic characteristic of ZVS, the fact that the resonant current is passing through the switches only during a fraction of the period, the high-voltage transfer ratio, and the inherent input/output (I/O) isolation, make the proposed topology a viable design alternative in avionic and aerospace applications     

Single-phase three-level rectifier and random PWM inverter drives

A novel ac/dc/ac converter topology with three-level pulsewidth modulated (PWM) scheme for the single-phase ac/dc rectifier and random PWM scheme for ac drives is proposed. In order to improve the power quality in the single-phase rectifier, a ROM-based (read-only memory) control scheme, based on hysteresis current comparator, region detector, and capacitor compensator, is used to achieve a sinusoidal line current with low current distortion. The control scheme of the adopted three-level rectifier is easy to implement. The blocking voltage of power switches is clamped to half of the dc bus voltage. To reduce the mechanical vibration from an induction motor, random pulse position PWM scheme is adopted to spread the harmonics in a wide frequency range which results in the reduction of torque pulsation in the ac motor drives. Simulation and experimental results based on the laboratory prototype circuit are presented to verify the proposed control scheme     

Output voltage bounds of a three-phase boost rectifier

A general closed-form duty cycle control law is derived based on the linear combination of two sets of continuous duty cycle control laws. From this general solution one can generate infinitely many pulsewidth modulation (PWM) control strategies to achieve the same ideal performance. Then, from the resulting closed-form solution, a general explicit lower bound and a general explicit upper bound of the output dc voltage are derived. Besides the academic interests, these bounds are very useful practically as a convenient guideline for helping quickly design the three-phase boost rectifier. Finally, some illustrative examples are given and some experimental results provided for verifying the derived bounds