带通限幅器对锁相环噪声性能的影响

锁相环路中,在鉴相器前加上AGC（自动增益控制）,可以使环路性能在输入信噪比发生变化时保持稳定,带通限幅器也可以起到类似作用。尽管有一些文章对限幅器的性能作了研究,但是在PLL（锁相环）闭环条件下,鲜有文章分析其对环路噪声性能的影响。因此,文章以基本PLL环路的数学模型为基础,推导出PLL中分别加入相干AGC和带通限幅器后新的环路数学模型,以一阶PLL为例,计算和比较不同控制方式下环路相位误差均方值的变化,最后说明应当根据飞行任务的不同选择对环路更有利的控制方式。     

Low C/N_0 Carrier Tracking Loop Based on Optimal Estimation Algorithm in GPS Software Receivers

Suppressing jitter noises in a phase locked loop(PLL) is of great importance in order to keep precise and continuous track of global positioning system(GPS) signals characterized by low carrier-to-noise ratio(C/N0).This article proposes and analyzes an improved Kalman-filter-based PLL to process weak carrier signals in GPS software receivers.After reviewing the optimal-bandwidth-based traditional second-order PLL,a Kalman-filter-based estimation algorithm is implemented for the new PLL by decorrelating the model error noises and the measurement noises.Finally,the efficiency of this new Kalman-filter-based PLL is verified by experimental data.Compared to the traditional second-order PLL,this new PLL is in position to make correct estimation of the carrier phase differences and Doppler shifts with less overshoots and noise disturbances and keeps an effective check on the disturbances out of jitter noises in PLL.The results show that during processing normal signals,this improved PLL reduces the standard deviation from 0.010 69 cycle to 0.007 63 cycle,and for weak signal processing,the phase jitter range and the Doppler shifts can be controlled within ±17° and ±5Hz as against ±25° and ±15 Hz by the traditional PLL.     

一种低噪声和高精度的频率合成技术

介绍了锁相环(PLL)技术和直接数字式频率合成(DDS)技术的基本工作原理,给出了一种提高DDS输出频率精度及减小其相位截断误差的方法。     

Carrier loop architectures for tracking weak GPS signals

The performance of various carrier recovery loop architectures (phase lock loop (PLL), Doppler-aided PLL, frequency lock loop (FLL), and Doppler-aided FLL) in tracking weak GPS signals are analyzed and experimentally validated. The effects of phase or frequency detector design, oscillator quality, coherent averaging time, and external Doppler aiding information on delaying loss of lock are quantified. It is shown that for PLLs the metric of total phase jitter is a reliable metric for assessing low C/N performance of the tracking loop provided the loop bandwidth is not too small (~> 5 Hz). For loop bandwidths that are not too small, total phase jitter accurately predicts carrier-to-noise ratio (C/N) at which loss of lock occurs. This predicted C/N is very close to the C/N predicted by bit error rate (BER). However, unlike BER, total phase jitter can be computed in real-time and an estimator for it is developed and experimentally validated. Total phase jitter is not a replacement for BER, since at low bandwidths it is less accurate than BER in that the receiver loses lock at a higher C/N than predicted by the estimator. Similarly, for FLLs operating at small loop bandwidths, it is found that normalized total frequency jitter is not a reliable metric for assessing loss of lock in weak signal or low C/N conditions. At small loop bandwidths, while total frequency jitter may indicate that a loop is still tracking, the Doppler estimates provided by the FLL will be biased.     

Transient Frequency-Error Statistics in Acquisition of Noiseless First-Order Phase Lock Loop

After a certain time interval from the appearance of a reference signal in a synchronizing system employing a first-order phase lock loop (PLL), the probability that the output frequency error will be higher than a maximum tolerated value is determined. The system is assumed to be noise free.     

Improved Phase-Locked Loop Performance with Adaptive Phase Comparators

A major problem in phase-locked loop (PLL) design is to meet the requirements of both fast signal acquisition and good synchronous mode performance. This relation is reviewed for different types of phase comparators. As a result a new phase-and-frequency comparator is proposed. This comparator is based on an up-down counter principle and can be considered as an adaptive acquisition control circuit. The analysis of a PLL with the proposed phase comparator is based on an exact calculation method for the pull-in time. It is shown that fast signal acquisition is possible without affecting the filtering properties of the loop. Experimental results are given of the acquisition behavior of a second-order type-2 loop which show a good correspondence with the theoretical analysis.     

Cycle slip performance of digitally implemented phase detectors onAWGN channel

Cycle slip performance of digitally implemented phase detectors on additive white Gaussian noise (AWGN) channel is investigated. The performance measure evaluated is the mean cycle slip time of a first-order phase-locked loop. An equivalent phase detector model with state-dependent loop noise is employed. It is shown that this working basis is vital to arrive at correct results. Numerical results for triangular and saw-tooth type phase detectors are reported and compared with those for the multiplier phase detector     

Carrier Tracking by Smoothing Filter Improves Symbol SNR

The potential benefit of using a smoothing filter to estimate a carrier phase over use of phase-locked loops (PLL) is determined. Numerical results are presented for the performance of three possible configurations of an all-digital coherent demodulation receiver. These are residual carrier PLL, sideband-aided residual carrier PLL, and finally sideband aided with Kalman smoother. The average symbol SNR after losses due to carrier phase estimation is computed for different total power SNRs, symbol rates, and symbol SNRs. It is found that smoothing is most beneficial for low symbol SNRs and low symbol rates. Smoothing gains up to 0.7 dB over sideband-aided residual carrier PLL, and the combined benefit of smoothing and sideband aiding relative to residual carrier loop is often in excess of 1 dB.     

Imperfect Carrier Recovery Effect on Filtered PSK Signals

Coherent demodulation of a PSK signal requires the generation of a local carrier phase reference. Methods are given to determine the detection loss caused by noisy phase recovery and its use in the coherent detection of filtered BPSK and QPSK signals. It is assumed that the phase noise can have a static part and a random component with a Tikhonov-type distribution. The static part is mostly due to offset frequency tracking of the PLL used to recover the carrier, while the random component is due to thermal noise present in the carrier recovery loop and is also due to the random nature of the phase modulation. It is shown that the probability of error of BPSK and QPSK can be expressed as a finite sum of a set of strictly alternating converging series when the number of ISI terms is finite. Upper and lower bounds on the probability of error have been derived when this number becomes infinite and we show how this error rate can be computed with any desired accuracy. Numerical results are presented for various values of static error and phase noise variance when the transmit and receive filters are 4-pole Butterworth filters. For filtered PSK signals and for a bit error rate of 10-6, our results show that the additional degradation in presentday receiver systems due to imperfect carrier recovery can be less than 0.1 dB for BPSK and less than 1 dB for QPSK.     

Limiting the Impulsive Noise in a PLL

This paper analyzes the operation of a phase-locked loop (PLL) preceded by a bandpass limiter (BPL) in the presence of impulsive noise. It is shown that the effect of the limiter consists essentially in a change of the statistics of the pulse strengths of the noise, so that the behavior of a BPL + PLL can be deduced from that of a simple PLL by suitable adjustment of the noise model. It is found that the limiter greatly enhances the PLL performance by reducing both the phase-error variance in the loop and the probability of cycle slippage. Finally, the design of the filter of the BPL is discussed, resulting in the conclusion that the best results are obtained by using a singletuned RLC circuit.     

用于非线性有源天线的耦合锁相环特性分析

为实现非线性有源天线阵波束扫描,研究了互耦锁相环(PLL)的基本特性。通过对互耦PLL的相位动力学方程的稳定性进行分析,建立了具有延时的阵列模型;通过调节环路延时,互耦PLL不同的非线性动力学特性;采用四单元的耦合锁相环阵列实验电路对理论分析进行了验证,从而提出了在设计基于耦合锁相环的非线性有源天线时,必须对环路延时进行控制,防止环路出现振荡和混沌现象。     

基于锁相环的光电振荡器频率稳定化研究

通过构建小数分频锁相环,将一个工作于X波段的OEO(OptoElectronic Oscillator,光电振荡器)与OCXO(Oven-Controlled Crystal Oscillator,恒温晶体振荡器)进行锁相,得到了输出信号相位噪声和长期频率稳定度的提升。从PLL(Phase-Locked Loop,锁相环)环路传输特性出发,理论分析了PLL输出信号环路带宽内相位噪声水平和作用范围。为降低OEO整体的相位噪声,采用SIL(Self-Injection-Locking,自注入锁定)使OEO在10Hz~10kHz频偏处的相位噪声得到20dB以上的抑制。在此基础上将此SIL OEO与一个频率为100 MHz的OCXO锁相,获得了频率为9.95GHz、相位噪声为-55dBc/Hz@10Hz和-124dBc/Hz@10kHz的微波信号输出,其频率的重叠阿伦方差在100s平均时间内达到1.14×10~(-11),证明了提出的方案对提升OEO频率稳定性具有一定的实际意义。     

Comments on ?M-Ary Cpsk Detection with Noisy Reference and Interiverers?

The effect of cycle slips of the carrier recovery phase-locked loop (PLL) on the performance of coherent M-ary phase-shift keyed (MPSK) systems is dealt with. It is shown that each cycle slip causes a 1 bit error in a differentially encoded and Gray encoded signal stream. Different situations are investigated and compared with regard to the effect of these errors.     

Synchronization failure rates in master-slave synchronizedphase-locked loops

A method for the computation of synchronization failure rates in master-slave phase-synchronized first-order phase-locked loops (PLLs) is presented. The method assumes (propagation) delay times that are long compared with tracking loop time constants and allows system optimizations of the slaved PLL in terms of improved tracking performance. Frequency turnaround ratios of phase-coherent transponders are considered, and effects of the converted transponder phase jitter on the tracking performance of the slaved PLL are discussed     

Phase-Lock Loop Jump Phenomenon in the Presence of Two Signals

Jump phenomena are known to exist in many non-linear systems [I], [2], [3]. The non-linear analysis presented in this paper explains and predicts the conditions for the jump phenomenon that is observed in a phase-locked loop (PLL) preceded by an automatic gain control (AGC). The jump phenomenon occurs when the frequency separation AM of two sinusoids at the input to the AGC is greater than the bandwidth B of the linearized PLL. If the loop is initially locked to the stronger signal, the weaker signal will frequency-modulate the PLL voltage-controlled oscillator (VCO) with a modulation frequency AI. The amplitude S2 of the weaker signal al can be increased until it becomes greater than the amplitude Si of the signal being tracked, without causing the loop to lose lock; i. e., the VCO continues to track the original signal. However, if the ratio of the amplitudes S2 S1 = R is increased above some critical value RC > 1, the loop will lose lock on the original signal, and jump to track the interfering signal. If the frequency separation is at least twice the PLL bandwidth, a good approximation for this critical ratio is Rc ? ?w/B.     

基于UKF准开环结构的高动态载波跟踪环路

 对高动态环境下的全球卫星导航系统（GNSS）载波信号跟踪方法进行了研究。在分析高动态载波信号模型的基础上,提出了一种基于无迹卡尔曼滤波（UKF）的准开环载波跟踪方法。此方法能够消除导航数据二进制相移键控(BPSK)调制的影响,并采用四维UKF相位估计模型提高跟踪精度,同时对估计值进行补偿以减少滤波器的滞后性。通过模拟接收机的高动态运动轨迹,从跟踪误差、跟踪结果和补偿效果3个方面,与基于卡尔曼滤波（KF）的锁频环(FLL)辅助锁相环(PLL)结构的传统跟踪方法进行比较,结果表明基于UKF的准开环跟踪方法能够有效地完成高动态环境下的载波跟踪。     

双绕组感应发电机静止励磁调节器的锁相环研究

双绕组感应发电机具有随负载变化调节励磁磁场、保持负载电压恒定不变的优点,通过静止励磁调节器输出的有功电流控制母线电压、无功电流控制负载电压,两者经过坐标变换形成反馈电流,实现系统的闭环控制。锁相环(PLL)为坐标变换提供相位信息,选用合适的PLL可以提高坐标变换的动静态性能,为控制系统提供快速准确的反馈信息。分析了双绕组感应发电机励磁电压的特点,分析了双dq变换PLL、延时信号对消PLL、基于延时信号对消的滑动平均滤波PLL的各自工作特点,最后优选了基于延时信号对消的滑动平均PLL检测励磁电压相位。     

一种用于深空测距的数字化锁相环设计

在深空测距中,扩大锁相环捕获范围与提高锁相环对微弱信号检测能力是一对矛盾。为解决这一矛盾,本文提出一种基于频率引导与二次混频的数字化锁相环结构,并对其性能进行理论分析和计算机仿真。仿真结果表明,该锁相环可以很好地在较大范围内实现对微弱测距信号的捕获锁定。该结构已在实际测距接收机中使用。     

Phase-Locked Loop Behavior near Threshold

The phase-locked loop behavior is analyzed following the quasilinearization Booton's method. When the loop is locked on an unmodulated input signal with a static phase error, the phase detector nonlinearity produces an interaction between the static phase error and the voltage-controlled-oscillator (VCO) noise phase fluctuations. Formulas allowing one to compute the static phase error increase and the VCO phase variance increase are derived. When the input signal is phase modulated, there is an interaction between the static phase error, the VCO noise phase fluctuations, and the input signal phase modulation. Formulas are obtained that allow one to compute the loop loss of performances (static phase error increase and VCO phase variance increase) and the coherent phase demodulator output signal-to-noise ratio decrease. Finally, a slight modification to Booton's procedure is proposed, leading to results in better agreement with experimental data.