Cycle slip performance of digitally implemented phase detectors onAWGN channel

Cycle slip performance of digitally implemented phase detectors on additive white Gaussian noise (AWGN) channel is investigated. The performance measure evaluated is the mean cycle slip time of a first-order phase-locked loop. An equivalent phase detector model with state-dependent loop noise is employed. It is shown that this working basis is vital to arrive at correct results. Numerical results for triangular and saw-tooth type phase detectors are reported and compared with those for the multiplier phase detector     

Random Characteristics of the Type II Phase-Locked Loop

The results of a study of the characteristics of the second-order Type II phase-locked loop with a Gaussian noise input, and obtained by digital computer simulation, are presented. The digital simulation is described and the random state variables are defined such that their characteristics can be interpreted in terms of existing phase portraits of autonomous phase-locked loops. The statistics associated with the state variables, which are phase error and a measure of frequency error, and those associated with the number of cycles skipped and the mean time to unlock, are given.     

Comments on ?M-Ary Cpsk Detection with Noisy Reference and Interiverers?

The effect of cycle slips of the carrier recovery phase-locked loop (PLL) on the performance of coherent M-ary phase-shift keyed (MPSK) systems is dealt with. It is shown that each cycle slip causes a 1 bit error in a differentially encoded and Gray encoded signal stream. Different situations are investigated and compared with regard to the effect of these errors.     

Noise Dynamics of the Phase-Locked Loop with Signal Clipping

Employing techniques similar to the averaging methods of Krylov and Bogoliubov, an approximate noise analysis of the phase-locked loop with signal clipping is presented. The validity of the method is demonstrated by comparing the stationary probability density function for the phase error, generated by a system simulation, with the derived theoretical results. The latter portion of the paper discusses the relation of the phase-locked loop to Kalman-Bucy filter theory and presents a demodulator design that illustrates the self-adaptive properties attainable in phase-locked loops with signal clipping.     

Switchless Control Strategies for Minimum Time Frequency Transitions in Phase-Locked Loops

The problem of minimum time frequency transitions in phase-locked loops with both phase and frequency controls applied is investigated using Pontryagin's maximum principle. Typically, a type II secondorder loop with a damping ratio of 0.707 subjected to a step change in the frequency of its input signal is considered and switchless control strategies that force the transients in the loop to settle down in minimum time are obtained.     

Interference in Frequency-Locked Doppler Tracking Loops

The effects of interference on frequency-locked Doppler tracking loops are investigated. Conditions for jump from locking on the desired signal to locking on the interfering signal are established. Parasitic frequency modulation of the desired signal results when the other signal interferes with it. The index of this parasitic modulation as a function of the interference-to-desired signal amplitude ratio is computed. Both critical amplitude ratio and critical parasitic modulation index at the occurrence of jump are derived. Comparing frequency-locked loops with phase-locked loops with phase-locked loops in the presence of interference shows the former performs better for most cases of practical importance in Doppler tracking systems.     

Eliminating False Lock in Phase-Locked Loops

A model is developed for phase-locked loops incorporating phasefrequency detectors. This model facilitates analysis of the loop and enables us to derive the conditions for false lock. It is shown by analysis that phase-locked loops with phase-frequency detectors are indeed capable of false lock; this theoretical result is verified by experimental results. A method for eliminating false lock is then proposed. This method was implemented in a simple circuit; we present the results of this experiment and show that the method we propose is capable of eliminating false lock.     

A Comparison of Second, Third, and Fourth Order Phase-Locked Loops

This paper presents data describing various performance characteristics of phase-locked loops, which were obtained for the purpose of determining an optimum selection of system order in view of typical operating conditions. With the functions optimized with respect to particular performance characteristics, calculations of the integrated square error and peak error with polynomial inputs are presented in terms of the noise bandwidth; and the generalized error coefficients are also provided in terms of the bandwidth with consideration for the use of both perfect and imperfect integrators. With specific input functions as provided by signals transmitted from earth satellites, an improved performance is demonstrated with the use of the higher order loops, and experimental results verify the calculations and also demonstrate the feasibility of the fourth order loop design.     

Synchronization failure rates in master-slave synchronizedphase-locked loops

A method for the computation of synchronization failure rates in master-slave phase-synchronized first-order phase-locked loops (PLLs) is presented. The method assumes (propagation) delay times that are long compared with tracking loop time constants and allows system optimizations of the slaved PLL in terms of improved tracking performance. Frequency turnaround ratios of phase-coherent transponders are considered, and effects of the converted transponder phase jitter on the tracking performance of the slaved PLL are discussed     

基于DSP的测试转台控制系统研究与设计

以锁相环控制为基础研究了转台速率控制系统的设计,利用数字信号处理芯片DSP、高速A/D和D/A芯片(AD7865和AD7836)以及FPGA技术完成了系统硬件电路设计,和关键逻辑电路——指令脉冲发生器、精密移相器、鉴相器的设计,并设计了控制器,给出了软件设计流程和仿真结果。实际运行表明系统稳定可靠,满足了转台的设计性能要求。     

单晶高温疲劳损伤参量的选取与寿命建模

高温疲劳损伤是引起单晶涡轮叶片破坏的主要因素之一。利用不同试验条件下DD6标准试件的低周疲劳和蠕变-疲劳试验结果,结合基于滑移系的黏塑性应力-应变分析,分别研究了晶体取向、应变范围、平均应变以及保载时间等对单晶高温疲劳损伤的影响机制。进而采用滑移剪应变最大的滑移系作为临界滑移系,选取临界滑移系上的最大Schmid应力、最大滑移剪应变率、循环Schmid应力比以及滑移剪应变范围等细观参量作为损伤参量,建立了一种新的基于临界平面的循环损伤累积（CDA）模型。结果表明,该模型对于DD6高温疲劳寿命预测精度基本在3倍分散带内。     

Statistical Analysis of Digital Phase-Locked Loops Fading Channiels

Statistical analyses of zero-crossing sampling first- and second order digital phase-locked loops in fading channls (DPLFC) are presented. A DPLFC is defined as one where the incoming signal is not only corrupted by additive Gaussian noise channel (AGN) but also by a fading communication channel. The three fading channels considered are the log-normal, Rayleigh, and Rician channels. The performance degradation of the DPLFC operation is characterized by the steady-state phase-error process probability density function and phase-error variance. Approximate analytic expressions for the phase-error statistics of a first-order DPLFC for both phase-step and frequency-step inputs are obtained by solving the Chapman-Kolmogorov equation associated with the phase-error process. The second-order DPLFC is analyzed for a frequency-step input. Numerical and simulation results are provided confirming the analyses presented for the three fading channels considered.     

优选小波神经网络在周跳探测与修复中的应用

北斗导航定位过程中,传统的周跳探测与修复方法缺乏检验环节,无法保证修复结果的可靠性。为此,提出了一种级联式小波变换结合NARX神经网络多步循环预测修复的方法处理周跳问题。该方法通过构造载波相位双差模型检验量,探测周跳发生历元,采用NARX神经网络预测方法修复周跳,利用优选小波基函数进行周跳修复效果检验。实验证明,相较于经验模态分解和变分模态分解等模态分解法,优选小波神经网络周跳探测与修复方法可用于小周跳探测并判断出周跳正负性;构造的NARX神经网络周跳修复模型,解决了普通神经网络模型和传统多项式拟合法容易造成的二次奇异值问题。相较于长短期记忆(LSTM)和门控循环单元(GRU)深度学习神经网络模型,周跳预测精度分别提高了45.2%和55.9%。     

Noise analysis of a digital tanlock loop

The noise performance analysis of a nonuniform digital phase-locked loop (DPLL), called the digital tanlock loop (DTL), is investigated by both analytic and computer-simulation methods. The results are presented in terms of phase error probability mass function and mean time to skip cycle versus input signal-to-noise ratio (SNR). These results are compared to the ones obtained with the conventional sinusoidal DPLL loop (DPLL). It is found that, for low-to-moderate input SNR, the DTL has only a slight improvement over the DPLL. The DTL, however, has larger linear characteristics than the conventional DPLL, which makes it attractive for applications that require an increased tracking range or as a first stage in carrier tracking systems based on optimum estimation procedures such as a Kalman smoother     

Frequency Tracking Characteristics of Split-Loop Phase-Locked Receivers

The excess time delay introduced by the incorporation of the intermediate frequency (IF) stage within the phase-locked loop (PLL) causes serious deterioration in the acquisition and tracking performance of the loop. The split-loop phase-locked system suggested by McGeehan and Sladen considerably reduces the effect of time delay on the acquisition and tracking performance of the loop. The frequency acquisition characteristics of the split-loop phase-locked receiver is investigated, and the effect of possible asymmetry in the arms of the loop on the acquisition range is examined. Closed-form approximate formulas are derived, and a comparison between split-, long-, and short-loop acquisition performance is presented.     

Pull-In Behavior of Third-Order Generalized Phase-Locked Loops

This paper analyzes third-order phase-locked loops with an arbitrary phase-detector characteristic and imperfect integration by the quasi-stationary approach with a suitable linearization of the non-linear differential equation deseribing the loop behavior; ideal integration is also considered. The main feature of this technique is the use of an easy mathematical approach which allows a direct physical insight into acquisition behavior and the development of simple expressions for the time and pull-in range.     

基于临界平面法的镍基单晶高温合金高周疲劳寿命模型

由于目前,国外已经基于八面体滑移系,采用临界平面法对镍基单晶高温合金〈001〉取向的高周疲劳寿命进行预测.然而,该方法未考虑〈111〉取向受载时滑移系参量的特点,所以不能较准确地预测镍基单晶高温合金〈111〉取向的高周疲劳寿命.为此,选取临界平面时综合考虑六面体、八面体滑移系,选定疲劳参量最大的滑移面作为临界平面,采用SSR(shear stress range),CCB(Chu-Conle-Bonnen),Walls寿命模型进行镍基单晶高温合金高周疲劳寿命预测,并根据800℃下DD6镍基单晶高温合金〈001〉,〈011〉,〈111〉3个取向的高周疲劳试验结果,对寿命模型的预测精度进行验证.结果表明:当基于两种滑移系预测镍基单晶高温合金的高周疲劳寿命时,寿命模型的拟合系数可达到0.9134.      

Controlled-root formulation for digital phase-locked loops

In a new formulation for digital phase-locked loops, loop-filter constants are determined from loop roots that can each be selectively placed in the s-plane on the basis of a new set of parameters, each with single and direct physical meaning in terms of loop noise band, width root-specific decay rate, or root-specific damping. Loops of first to fourth order are treated in the continuous-update approximation (B_L T→0) and in a discrete-update formulation with arbitrary B _LT. Deficiencies of the continuous-update approximation in large-B_LT applications are avoided in the new discrete-update formulation. A new method for direct, transient-free acquisition with third- and fourth-order loops can improve the versatility and reliability of acquisition with such loops     

基于SMDO的滑模控制器设计及其在导弹上的应用

提出了一种基于滑模干扰观测器(SMDO)的滑模控制器(SMC)设计方法.针对一类级联多输入多输出(MI-MO)非线性系统,根据奇异摄动原理将其分为内、外回路分别进行控制器设计.以外回路为例,分析了传统基于饱和函数的滑模控制的鲁棒性,针对其在面I临干扰时鲁棒性较差的问题,在名义滑模控制律的基础上设计了基于超扭曲算法的SM...     

An Extension of Viterbi's Analysis of the Cycle Slipping in a First-Order Phase-Locked Loop

The phenomenon of cycle slipping in a first-order phase-locked loop is reconsidered and a simple expression for the expected number ? of cycles slipped per second is given in the form of a rapidly converging series. In this way the computation of ? becomes much easier than with previously known formulas. A formula allowing the computation of the expected number of cycles gained or lost per second is also given. These results are obtained by extending a technique used by Viterbi. The outcome of experimental verifications of the theory is also reported.