Turbo-TCM在AWGN和Rayleigh衰落信道下的性能研究

给出了一种简单的 Turbo-TCM解调译码方法 ,使用这种方法可较容易地把 Turbo码用于各种编码速率和 QPSK,8PSK,1 6QAM或 64QAM等各种调制方式下的 TCM系统中。研究了各种编码速率和调制方式的 Turbo-TCM在 AWGN和 Rayleigh衰落信道下的性能 ,并给出了仿真试验结果。     

Turbo-TCM在AWGN和Raylelgh衰落信道下的性能研究

给出了一种简单的Turbo-TCM解调译码方法，使用这种方法可较容易地把Turbo码用于各种编码速率和QPSK，8PSK，16QAM或64QAM等各种调制方式下的TCM系统中。研究了各种编码速率和调制方式的Turbo-TCM在AWGN和Rayleigh衰落信道下的性能，并给出了仿真试验结果。     

基于串行级联网格图的串行级联卷积码性能分析

分析了串行级联卷积码的编译码原理,提出了一种可直观表示串行级联卷积码编码原理的串行级联网格图,并在信道模型中对串行级联卷积码和Turbo码的性能进行了仿真比较.结果表明,在适当的信噪比范围内,串行级联卷积码比Turbo码有更好的迭代增益和交织增益,可有效地避免Turbo码的“错误平层”效应.     

冗余PN序列网格编码码分多址通信

本文介绍近年来新兴的一种编码调制技术——网格编码调制(TCM),从理论上探讨了网格编码调制在码分多址(CDMA)通信系统中的应用,提出在网格编码调制码分多址通信系统中利用PN序列作为冗余措施的新思想,并对网格编码调制码分多址通信系统中双正交信号集的生成方法进行了研究。     

高速TCM传输技术及其应用

首先讨论了传统数字传输体制的特点，找出传统调制与编码的分离独立设计是制约数字通信系统性能进一步提高的本质根源；并由此论述了编码与调制相结合的高速数字传输体制，重点讨论了网格编码调制(TCM)技术的基本特点、集合分割映射原理、性能估算，并对TCM在AWGN信道中的性能进行了仿真。     

局部概率传播译码的非系统低密度卷积码

低密度卷积码(LDCC)是低密度码(LDPC)经由其产生矩阵的侧滑变换成为带状产生矩阵而得到的,具有LDPC和卷积码的误码性能好等一些共同特征。LDCC码的和积算法译码方法可以进一步改进为局部概率传播译码方法。采用流水线结构的局部概率传播译码方法用于LDCC码得到了接近和积算法的译码性能,而且译码延迟比LDPC大为降低,译码器更为简单,便于实时工作。     

无人机测控传输中SCCPM优化设计

针对无人机测控传输系统频率资源日趋紧张、电磁环境日渐复杂的现状,为提高无线传输频带效率和功率效率,在卷积码和CPM（Continuous Phase Modulation,连续相位调制）的基础上,提出一种基于SCCPM（Serially Concatenated CPM,串行级联CPM）的无人机遥控、遥测数据传输体制.通过引入Turbo（涡轮）码迭代原理设计CPM解调与卷积译码反馈校正结构,并对CPM解调算法进行优化以减小复杂度,得到相位连续、频谱紧凑、编码增益高、收敛特性好的无人机测控通信系统.仿真结果表明：所设计方案采用级联外迭代方式可获取更高的信噪比增益、更低的错误平层——与典型应用的RS（Reed-Solomon,里德-所罗门）码级联卷积码相比,该方案能够多获取1.6 dB的信噪比增益,表明SCCPM更适用于无人机测控数据传输.     

高性能串行维特比译码器的设计

卷积纠错编码广泛应用于各种通信领域,包括无线通信、视频点播等。如何来设计高性能的维特比译码器将最终决定一个通信系统的抗误码性能和数据纠错性能。本文提出了一种实用的设计思路,在ALTERA公司的STRATIX系列FPGA上实现了超过256kbps信源速率的全串行(2,1,7)维特比译码器。     

DCR系统的信道编译码方法研究

数字对讲机协议的制定是当前研究的热点,而信道编译码技术又是数字对讲机的关键技术之一.DCR系统吸收了dPMR系统的信道编译码方式的优点,同时采用删除卷积码纠错技术,提高了对传输差错的控制能力.对基于DCR协议的编译码方案和删除卷积码的编译码方法进行了研究,对不同编译码方式的误码率进行了深入分析.仿真结果表明：在多径衰落信道下,删除卷积码可以有效的纠正突发错误,大大降低误码率.     

衰落信道中不同集分割的Turbo TCM方案的性能研究

比较了衰落信道下两种不同的集分割方式,UP（Ungerboeck分割）和BP（分组分割）对Turbo TCM性能的影响。研究了在两种不同映射以及不同帧长度下Turbo TCM的性能。并给出了在8PSK和8ASK两种调制方式下的仿真试验结果,通过比较得出了很有意义的结果。     

基于DSP的Viterbi译码器的实现

介绍了一种运用DSP技术来实现维特比(Viterbi)译码器的方法。其中介绍了维特比译码器的原理及算法，及维特比译码器实现的过程。算法用C语言来编写，并成功地将其移植到DSP的集成开发环境CCS中。在此基础上，给出了硬件的仿真结果。由仿真测试结果表明，该系统编解码处理速度很高。     

Generalized Feedback Decoding of Convolutional Codes

The use of convolutional codes with feedback decoding is a common error-correction technique in simple communication systems. A drawback of conventional feedback decoding is the limitation to a class of self-orthogonal codes which, in general, are nonoptimum. Based on distance properties of the utilized code and test-error pattern analysis, we propose generalized feedback decoding which does not have the abovementioned limitation. This is minimum distance decoding and can be applied to any convolutional code while still maintaining its simplicity. Therefore, it has the advantage of being easily adopted in existing systems. We can use the relatively complicated Viterbi or sequential decoders in larger terminals and, with the same code, use the proposed decoders in smaller terminals; otherwise, both large and small terminals must utilize the same type of decoder. The proposed decoding scheme could also be used to simplify and speed up sequential decoding. In addition, comparisons of the proposed decoder with other feedback decoders are presented.     

一种基于语义分割的机场跑道检测算法

针对复杂电磁作战环境下无人机自主着陆应用场景,提出了一种基于图像语义分割的机场跑道检测算法,并设计构建了轻量高效的端到端跑道检测神经网络RunwayNet.在特征提取部分,使用空洞卷积对ShuffleNet V2进行改造,得到了输出特征图分辨率可调的主干网络,并利用自注意力机制设计了自注意力网络模块,使网络具备全局跑道...     

Decoding techniques in state estimation for dynamic systems withpast histories

States of dynamic models with a higher order memory are estimated using both a stack sequential decoding algorithm and the Viterbi decoding algorithm (VDA), without higher dimensional dynamic system representation. This results in memory reduction for state estimate implementation. It is found that state estimation with a stack sequential decoding algorithm is faster and more practical than the state estimation with the Viterbi decoding algorithm, even though the estimates obtained by the Viterbi decoding algorithm are superior     

高速RS译码器的FPGA实现

详细描述了RS译码器的结构及设计;并采用FPGA技术实现了高速RS译码器。测试表明,其最高传输速率可达100MB／s。该译码器可满足高码率传输需求的场合。     

基于维特比算法解调GMSK信号分析

文中介绍了二进制GMSK信号带宽占用率、数据预编码方案和利用维特比算法相干解调二进制GMSK信号的调制解调方法,给出了不同BT乘积情况下解析功率谱密度和模拟误码率结果,定量分析了邻信道干扰结果。结果说明,利用维特比算法解调4GMSK信号可以在满足接收机性能的基础上简化设计。     

High Hardware Utilization and Low Memory Block Requirement Decoding of QC-LDPC Codes

This paper presents a simple yet effective decoding for general quasi-cyclic low-density parity-check (QC-LDPC) codes, which not only achieves high hardware utility efficiency (HUE), but also brings about great memory block reduction without any performance degradation. The main idea is to split the check matrix into several row blocks, then to perform the improved message passing computations sequentially block by block. As the decoding algorithm improves, the sequential tie between the two-phase computations is broken, so that the two-phase computations can be overlapped which bring in high HUE. Two overlapping schemes are also presented, each of which suits a different situation. In addition, an efficient memory arrangement scheme is proposed to reduce the great memory block requirement of the LDPC decoder. As an example, for the 0.4 rate LDPC code selected from Chinese Digital TV Terrestrial Broadcasting (DTTB), our decoding saves over 80% memory blocks compared with the conventional decoding, and the decoder achieves 0.97 HUE. Finally, the 0.4 rate LDPC decoder is implemented on an FPGA device EP2S30 (speed grade -5). Using 8 row processing units, the decoder can achieve a maximum net throughput of 28.5 Mbps at 20 iterations.     

Computer Algorithm for Coding Gain

Coding gain is described as used in space communications engineering, and an empirical formula for coding gain is presented. The formula is designed to fit available performance data for Viterbi soft-decision decoding of various nonsystematic convolutional codes and to have a functional form suitable for computer implementation.     

Fault diagnosis of bearings based on deep separable convolutional neural network and spatial dropout

Bearing pitting, one of the common faults in mechanical systems, is a research hotspot in both academia and industry. Traditional fault diagnosis methods for bearings are based on manual experience with low diagnostic efficiency. This study proposes a novel bearing fault diagnosis method based on deep separable convolution and spatial dropout regularization. Deep separable convolution extracts features from the raw bearing vibration signals, during which a 3 × 1 convolutional kernel with a one-s...