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1.
Phase-locked-loop (PLL) bit synchronizers often employ integrate-and-dump type phase detectors that provide phase error information only at discrete points in time. Usually these phase detectors are followed by sample-and-hold circuits to produce a stairstep error voltage as the input to a standard analog circuit loop filter. When the loop is configured in this manner, it is referred to as a hybrid PLL. Sampled-data analysis methods (Z transforms) are used to determine the stability and transient response of this loop.  相似文献   

2.
An Apollo ranging system is considered whose phase reference is obtained by a phase-locked loop for bit synchronization. The bit phase reference is noisy, and the error probability for the ranging code is shown to depend on the input signal energy per bit to noise density ratio. The procedure of computing the acquisition time for the ranging code is then presented and the acquisition time for a lunar ranging code is plotted versus the input signal-to-noise density ratio.  相似文献   

3.
针对过零检测实现的全数字锁相环不仅锁相速度慢, 而且过零点的扰动会 直接影响锁相精度以及适合模拟电路实现的相干解调技术,在数字电路中实现则需要设 计高阶数字低通滤波器,将占用大量数字电路资源并且会显著增加系统功耗等问题,在 设计一种新型全数字锁相环(All-digital Enhanced Phase-lock Loop,EPLL)的基础上,结合自 适应正交解调技术,提出了一种基于EPLL 技术的自适应正交解调技术方案,并对该方 案进行了研究与仿真。仿真得到了满意的结果,验证了基于EPLL 技术的自适应正交解 调技术方案的可行性,并研究验证了算法的参数变化对其性能的影响,为今后算法在数 字系统中的实现以及其在各领域的应用研究奠定了坚实的基础。  相似文献   

4.
赵琳  丁继成  孙明  舒宇 《航空学报》2010,31(6):1204-1212
为解决环路未锁定、无法找出正确的导航数据位跳变点时极弱全球定位系统(GPS)信号跟踪问题,通过分析信号跟踪模型和相关器1 ms采样数据特性,将最优路径动态规划算法应用于GPS位同步,并提出基于平方根无迹卡尔曼滤波(SRUKF)和位同步结合的载波联合跟踪算法。建立了适合位同步的SRUKF载波环参数估计模型,针对位同步的实现条件和无相位频率先验信息的情况,将位同步模块提前,研究设计了环路未锁定时串行和并行两种弱信号跟踪方案。位同步跟踪完成后环路采用单独的SRUKF工作方式。实验结果证实该文提出的算法具有较高的数据位边缘检测概率(EDR)和参数估计性能,而无须关心环路是否处于锁定状态,能够对载噪比低至22 dB/Hz的弱信号实现跟踪。  相似文献   

5.
The effect of cycle slips of the carrier recovery phase-locked loop (PLL) on the performance of coherent M-ary phase-shift keyed (MPSK) systems is dealt with. It is shown that each cycle slip causes a 1 bit error in a differentially encoded and Gray encoded signal stream. Different situations are investigated and compared with regard to the effect of these errors.  相似文献   

6.
7.
Carrier loop architectures for tracking weak GPS signals   总被引:8,自引:0,他引:8  
The performance of various carrier recovery loop architectures (phase lock loop (PLL), Doppler-aided PLL, frequency lock loop (FLL), and Doppler-aided FLL) in tracking weak GPS signals are analyzed and experimentally validated. The effects of phase or frequency detector design, oscillator quality, coherent averaging time, and external Doppler aiding information on delaying loss of lock are quantified. It is shown that for PLLs the metric of total phase jitter is a reliable metric for assessing low C/N performance of the tracking loop provided the loop bandwidth is not too small (~> 5 Hz). For loop bandwidths that are not too small, total phase jitter accurately predicts carrier-to-noise ratio (C/N) at which loss of lock occurs. This predicted C/N is very close to the C/N predicted by bit error rate (BER). However, unlike BER, total phase jitter can be computed in real-time and an estimator for it is developed and experimentally validated. Total phase jitter is not a replacement for BER, since at low bandwidths it is less accurate than BER in that the receiver loses lock at a higher C/N than predicted by the estimator. Similarly, for FLLs operating at small loop bandwidths, it is found that normalized total frequency jitter is not a reliable metric for assessing loss of lock in weak signal or low C/N conditions. At small loop bandwidths, while total frequency jitter may indicate that a loop is still tracking, the Doppler estimates provided by the FLL will be biased.  相似文献   

8.
近年来,针对弱信号的高灵敏度接收机已逐渐成为国内外的研究热点。加长相干积分时间可以提高信噪比,从而跟踪到更弱的信号。但是,北斗导航接收机跟踪环路并不可以无限加长相干积分时间,相干积分时间的长短和功效还受到卫星导航电文比特跳变的限制。为了消除导航电文比特跳变对相干积分的影响,提出了一种改进的基于最大似然估计的北斗信号位同步方法,完成位同步后再利用先猜后检的方法便可以实现长相干积分。利用软件接收机进行编程设计,仿真结果表明:该长相干积分算法能够稳定可靠地实现对弱信号的跟踪,20ms相干积分环路信噪比约提升12dB,40ms相干积分环路信噪比约提升15dB,80ms相干积分环路信噪比约提升17dB,提高了北斗导航接收机的灵敏度。  相似文献   

9.
The performance of PCM/FM using a delay-line detector in multipath interference is analyzed. In aeronautical telemetry applications, the multipath interference causes a in the signal spectrum which is web modeled by a channel composed of a line-of-sight signal and a strong specular reflection with magnitude /spl Gamma/ and excess delay less than a bit time. Analysis shows that the bit error probability is strongly dependent on the location of the within the spectrum. The bit error probability averaged over the location is also analyzed. For the case of no predetection filtering, the average bit error probability is dependent on the depth of the but not on the width. The loss in performance (relative to the AWGN environment) is bounded by (1-/spl Gamma/)/sup -2/ which is the depth of the . For the case of predetection filtering, the average bit error probability is dependent on both the width and depth of the . The performance loss is bounded by (1-/spl Gamma/)/sup -2/spl Gamma// which is less than that for the case of no predetection filtering.  相似文献   

10.
刘荣科  李满庆  侯毅 《航空学报》2012,33(4):715-721
 针对目前编码辅助载波同步算法中复杂度较高、延时大的问题,提出了引入辅助停止判决机制的编码辅助载波同步算法。在现有的编码辅助载波同步结构基础上,该算法能对环路信噪比(SNR)进行实时判定,在环路SNR满足限定条件后提前停止编码辅助载波同步迭代,而不影响译码性能。采用新的相位估计方式估计含相位噪声的载波相位,提升了该条件下的环路信噪比。仿真采用码率为1/2的低密度奇偶校验(LDPC)码作为编码方式,结果表明:在误码率为10-5时,该算法减少了约50%的编码辅助载波同步迭代次数;在含相位噪声的信号条件下,与理想解调译码相比,性能损失不超过0.15 dB。  相似文献   

11.
低密度卷积码(LDCC)是低密度码(LDPC)经由其产生矩阵的侧滑变换成为带状产生矩阵而得到的,具有LDPC和卷积码的误码性能好等一些共同特征。LDCC码的和积算法译码方法可以进一步改进为局部概率传播译码方法。采用流水线结构的局部概率传播译码方法用于LDCC码得到了接近和积算法的译码性能,而且译码延迟比LDPC大为降低,译码器更为简单,便于实时工作。  相似文献   

12.
针对皮卫星接收地面站测试系统解调器的应用场合,研究和开发了一种基于LabVIEW虚拟仪器开发平台的软件解调器,提出了一种简化的遥测信号解调算法。利用LabVIEW控制数据的采集和存储,通过VisualC 实现了解调算法,并在LabVIEW中调用该程序来实现地面站遥测信号的解调。给出了解调算法的原理、Costas环跟踪方差的MATLAB仿真和软件设计,通过误码率实验,测试结果证明了该设计的有效性。本解调系统具有应用灵活和便于改进的优点,已应用于皮卫星的测试实验。  相似文献   

13.
扩频通信系统伪码相位跟踪环性能研究   总被引:3,自引:0,他引:3  
在现代通信系统中,对于全数字化扩频接收机来说,由于伪码跟踪环中鉴相器具有非线性特性,所以有可能使扩频通信环路工作在非线性区域。本文分析了一种非相干伪码跟踪环路的线性以及非线性跟踪性能,并得到了环路的收敛域与收敛条件,这些分析结果对环路参数的设计都是至关重要的。  相似文献   

14.
The potential benefit of using a smoothing filter to estimate a carrier phase over use of phase-locked loops (PLL) is determined. Numerical results are presented for the performance of three possible configurations of an all-digital coherent demodulation receiver. These are residual carrier PLL, sideband-aided residual carrier PLL, and finally sideband aided with Kalman smoother. The average symbol SNR after losses due to carrier phase estimation is computed for different total power SNRs, symbol rates, and symbol SNRs. It is found that smoothing is most beneficial for low symbol SNRs and low symbol rates. Smoothing gains up to 0.7 dB over sideband-aided residual carrier PLL, and the combined benefit of smoothing and sideband aiding relative to residual carrier loop is often in excess of 1 dB.  相似文献   

15.
An extrapolation method is presented for determination of characteristic curves of long term bit error rate (BER) versus signal-to-noise ratio (SNR) for digital communication equipment. The method is to obtain a single reliable data point at a BER of 10-4 or 10-5 and then to draw a theoretically shaped curve through this reference. The technique is validated by both theoretically and experimentally demonstrating that variations of the internal anomalies that contribute to bit errors in digital communications receivers cause the BER curves to shift laterally, but that the curves retain their characteristic shape. Use of this extrapolation method can reduce test time by 3 to 4 orders of magnitude.  相似文献   

16.
A perfect third-order loop filter design that can be implemented as a digital filter is obtained which minimizes the noiseless steady-state acceleration rate (jerk) error for a fixed loop noise bandwidth. Simulations were performed to obtain transient responses of the third-order loop plus a sample fourth-order loop under a jerk input. The results enable one to obtain a loop design that minimizes the loop noise bandwidth required for a given steady-state jerk error and thus obtain better noise jitter performance.  相似文献   

17.
Some calculations of the effect of phased-array dispersion on degrading phase-shift-keyed (PSK) error rates are presented. The results are given in the form of curves of the bit error rate versus the ratio of array "fill-time" (propagation time across the array) to signaling interval. Values of this ratio in the range 0.5 to 0.8 are required to degrade the error rate by a factor of 2. These results were obtained for both linear and square arrays, and for rectangularpulse signaling over single-pole and two-pole Butterworth equivalent low-pass channels, as well as for impulsive signaling over an idealized channel with a raised-cosine frequency response.  相似文献   

18.
When the cumulative drift in the center frequency of a binary split-phase FSK signal exceeds the peak deviation of the signal, a conventional noncoherent receiver (i.e., one provided with only two IF filters) may be unable to achieve the probability of error per bit which the designer desires. This limitation may be overcome if the receiver is provided with a bank of more than two contiguous filters (each followed by an envelope detector) tospan the total IF band the instantaneous IF signal might occupy. It is shown that the probability of error per bit for such a receiver is a function of 1) the ratio F of peak frequency deviation to peak frequency drift, 2) the number M of IF filter/detectors, and 3) the signal-to-noise ratio ? in the output of the filter containing the signal. It is further shown thatfor a given value of F an increase in M reduces the amount of transmitter power the communication system designer must provide to yield a given probability of error per bit.  相似文献   

19.
A modified quadrature channel phase-locked-loop demodulator for binary phase-shift-keyed signals is presented. The modification, called decision feedback, is a practical implementation of decisiondirected channel measurement. Noise analyses are carried out for both additive and phase noise. An optimum loop filter is derived and the analyses include determination of probability of error for the system. The results of an analog simulation of the decision feedback technique are also included.  相似文献   

20.
A sampled-data delay-lock loop (SDDLL) which tracks the arrival time of a biphase modulated, pulsed-envelope RF signal is described. A pseudo-noise (PN) code generator is used as the modulation source as in conventional delay-lock loop tracking devices. Time base shifting of the loop's local clock is performed by digital means. The technique permits the use of a stable-frequency clock to maintain accurate timing between timing correction instants. An expression is derived for the standard deviation of the timing error due to additive Gaussian noise at the SDDLL input. Experimental results are then given which include the effects of control-system quantization error on timing jitter. Assuming that the errors due to input noise and quantized timing corrections are independent and additive, the theoretical and experimental results agree to within approximately one decibel.  相似文献   

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