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基于CPLD的多路脉冲序列信号检测器设计
引用本文:王凌,张兆宝,李涛.基于CPLD的多路脉冲序列信号检测器设计[J].海军航空工程学院学报,2009,24(5):485-488.
作者姓名:王凌  张兆宝  李涛
作者单位:1. 海军航空工程学院研究生管理大队,山东,烟台,264001
2. 海军航空工程学院新装备培训中心,山东,烟台,264001
摘    要:用VHDL语言在CPLD器件上实现了一种多路脉冲序列信号检测器,能够用七段数码管实时显示各路已检测出序列信号数目,电路各摸块用VHDL语言来描述。文章介绍了仿真信号的形成原理和电路设计方法,并给出了部分电路和仿真波形。整个多路脉冲序列信号检测器设计在一块CPLD芯片上,与其他方法设计的序列信号检测器相比,具有体积小、可靠性高、功牦低的特点。由于采用模块化的设计,对功能的修改和增加只要修改VHDL源程序,而不必更改硬件电路,从而实现数字系统硬件的软件化。

关 键 词:多路脉冲序列  信号检测器  VHDL  CPLD  电路设计

Design of Multiplex Pulse Sequence Signal Detector Based on CPLD
WANG Ling,ZHANG Zhao-bao and LI Tao.Design of Multiplex Pulse Sequence Signal Detector Based on CPLD[J].Journal of Naval Aeronautical Engineering Institute,2009,24(5):485-488.
Authors:WANG Ling  ZHANG Zhao-bao and LI Tao
Institution:( Naval Aeronautical and Astronautical University 1. Graduate Students' Brigade 2. New Equipment Training Center, Yantai Shandong 264001, China)
Abstract:A multiplex pulse sequence signal detector can be implemented using VHDL in the CPLD, and this detector can demonstrate the number of sequence signals which were checked out by seven-segment numeric indicator. Each module is described by VHDL. The principle that generated the simulation signals and the design methods were introduced. A part of circuit and simulation waveform was presented. The whole multiplex pulse sequence signal detector was designed on a CPLD chip. Compared with other existing sequence signal detectors, the proposed system was smaller in volume, more reliable in functioning and lower in power consumption. Owing to modular design, we can amend VHDL program to add function without amending hardware circuit, so digital system can be realized by software.
Keywords:VHDL  CPLD
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