| 常用雷达视频信号处理算法在FPGA上的实现 |
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| 引用本文： | 邱军海,关键,宋杰,李秀友.常用雷达视频信号处理算法在FPGA上的实现[J].海军航空工程学院学报,2006,21(6):637-641. |
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| 作者姓名： | 邱军海 关键 宋杰 李秀友 |
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| 作者单位： | 海军航空工程学院信息融合技术研究所,山东烟台,264001 |
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| 基金项目： | 全国优秀博士学位论文作者专项基金资助项目(批准号:200237) |
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| 摘 要： | 采用FPGA技术对雷达原始的视频信号进行求模、视频积累与恒虚警检测处理,克服了DSP处理速度有限、实时性差和ASIC器件灵活性差的问题。详细介绍了求模、视频积累以及恒虚警算法在FPGA芯片上实现的原理和过程,并结合仿真结果说明了利用FPGA进行雷达视频信号处理的优势。
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| 关 键 词： | 雷达 求模 视频积累 恒虚警 FPGA |
| 修稿时间： | 2006年3月31日 |
Realization of common radar video signal processing algorithm based on FPGA |
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| QIU Junhai,GUAN Jian,SONG Jie and LI Xiuyou.Realization of common radar video signal processing algorithm based on FPGA[J].Journal of Naval Aeronautical Engineering Institute,2006,21(6):637-641. |
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| Authors: | QIU Junhai GUAN Jian SONG Jie and LI Xiuyou |
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| Institution: | Institute of Information Fusion Technology,NAEI,Yantai,Shandong,264001,Institute of Information Fusion Technology,NAEI,Yantai,Shandong,264001,Institute of Information Fusion Technology,NAEI,Yantai,Shandong,264001 and Institute of Information Fusion Technology,NAEI,Yantai,Shandong,264001 |
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| Abstract: | The FPGA is used to realize the calculation of absolute value,video integration and CFAR detection of radar video signal.This technique can overcome the problem on limited processing speed,poor real time performance of DSP.The principle and course of calculating absolute value,video integration and CFAR detection algorithm based on FPGA are introduced.The advantages of FPGA are shown by simulation results of radar signal processing. |
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| Keywords: | radar calculating absolute value video integration CFAR FPGA |
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