| 高速数字电路设计研究 |
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| 引用本文： | 周堃.高速数字电路设计研究[J].航空计算技术,2003,33(2):125-128. |
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| 作者姓名： | 周堃 |
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| 作者单位： | 西北工业大学,金叶信息技术学院,陕西,西安,710072 |
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| 摘 要： | 数字电路的高速化已是大势所趋,而高速数字电路的设计又给工程师带来了众多新问题。本文从理论的角度概述了高速数字电路设计的特点,并对信号完整性设计及电源完整性设计从原理上进行了较详细的论述。
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| 关 键 词： | 高速数字电路 信号完整性 电源完整性 |
| 文章编号： | 1671-654X(2003)02-0125-04 |
| 修稿时间： | 2003年2月20日 |
Study of High-Speed Digital Design |
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| ZHOU Kun.Study of High-Speed Digital Design[J].Aeronautical Computer Technique,2003,33(2):125-128. |
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| Authors: | ZHOU Kun |
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| Abstract: | The speed of digital circuit is becoming higher and higher, and this tendency brings the circuit designer many problems. From the theoretic point of view, this paper provides a survey about the characteristic of high-speed digital design, and a detail information about the signal integrity design and the power integrity design as well. |
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| Keywords: | high-speed digital signal integrity power integrity |
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