面向并行模拟机的path-CSA MOS开关模型及评价算法

 提出一种新型MOS开关模型,它基于MOS CSA模型,又具有path MOS模型特性。新模型采用了逻辑门一级的Time-mapping事件驱动算法,有利于采用并行模拟机硬件实现。新算法利用了path MOS模型路径法特性,因而克服了CSA方法中的LOOP问题。新算法中首次提出最大、最小信号强度传送及评价操作,克服了MOS电路逻辑模拟中存在的不定值X问题。

PATH-CSA: A PARALLEL SIMULATION ENGINE ORIENTED MOS MODEL AND EVALUATION ALGORITHM

In this paper, a parallel simulation engine oriented path-CSA MOS model and its evaluation algorithm are presented. This new model is a combination of both the CSA and the path MOS models. The evaluation algorithm of this model is a time-mapping event driven method which is often used in logic simulators, and therefore, it can be combined with logic simulators and implemented easily by hardware. As the path characteristics of the path MOS model are also included in this model, the loop problem in the CSA MOS model can be solved too. In this new method, a mathematical system with maximum and minimum signal strength transmission and operation is proposed. Therefore, the undefined problem (X problem) can be solved as well.