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用于定位导航授时微终端的SoC系统设计
引用本文:黎超,郭美凤,周斌,张嵘,侯波.用于定位导航授时微终端的SoC系统设计[J].导航与控制,2019(2):39-45.
作者姓名:黎超  郭美凤  周斌  张嵘  侯波
作者单位:清华大学, 北京 100084,清华大学, 北京 100084,清华大学, 北京 100084,清华大学, 北京 100084,清华大学, 北京 100084
摘    要:为了解决遮挡情况下的实时定位问题,美国提出了Micro-PNT方案,我国也提出了定位导航授时微终端(Micro Positioning Navigation and Timing Terminal,MPNTT)方案。定位导航授时微终端集成了卫星导航系统、微惯性测量单元、微型原子钟及处理器系统,可为终端用户提供精确可用、完好及时、连续安全的定位导航服务。介绍了一种用于定位导航授时微终端的SoC系统设计,其包括了基于SoC FPGA的硬件设计和基于GNSS/MIMU的组合导航滤波算法。SoC系统集成了FLASH、SSRAM等存储芯片,通过RS422、RS232、CAN等通信接口接收GNSS、MIMU及外源传感器信息,并在ARM核中完成组合导航算法,以得到导航结果。SoC芯片单片实现了ARM与FPGA的功能,系统集成面积满足小型化需求,为后续移植为ASIC芯片提供了基础。对组合导航滤波算法进行嵌入式软件移植并测试,结果表明:SoC系统单次惯导解算时间为7ms,实测与仿真输出的导航位置差距在0.05m以内,俯仰角差和横滚角差在0.005°以内,航向角差在0.05°以内。本文设计的SoC系统高精度、集成化、可扩展,满足了微终端的要求。

关 键 词:定位导航授时微终端  SoC系统  组合导航滤波算法  小型化

Design of SoC System for Micro Positioning Navigation and Timing Terminal
LI Chao,GUO Mei-feng,ZHOU Bin,ZHANG Rong and HOU Bo.Design of SoC System for Micro Positioning Navigation and Timing Terminal[J].Navigation and Control,2019(2):39-45.
Authors:LI Chao  GUO Mei-feng  ZHOU Bin  ZHANG Rong and HOU Bo
Institution:Tsinghua University, Beijing 100084,Tsinghua University, Beijing 100084,Tsinghua University, Beijing 100084,Tsinghua University, Beijing 100084 and Tsinghua University, Beijing 100084
Abstract:In order to solve the problem of real-time positioning under occlusion, the micro-PNT scheme is proposed by the United States, and the scheme of micro positioning navigation and timing terminal(MPNTT) is also proposed by China. The MPNTT integrates satellite navigation system, micro inertial measurement unit, micro atomic clock and processor system to provide the positioning and navigation service which is precise and reliable, intact and timely, continuous and safe for end users. In this paper, the design of SoC system for MPNTT is introduced, including the hardware design based on SoC FPGA and the integrated navigation filtering algorithm based on GNSS/MIMU. SoC system integrates FLASH, SSRAM and other memory chip. The sensor information such as GNSS, MIMU is received through RS422, RS232, CAN and other communication interfaces, then is sent to ARM core for integrated navigation algorithm to get navigation results. SoC chip monolithically implements the functions of ARM and FPGA, and the system integration area meets the needs of miniaturization, which provides the basis for subsequent transplantation of ASIC chip. The integrated navigation filtering algorithm is transplanted into embedded software and tested. The results show that the single inertial navigation calculation time of SoC system is 7ms, the difference of navigation position between measurement and simulation output is less than 0.05m, the difference of pitch angle is less than 0.005° as same as the difference of rolling angle, and the difference of heading angle is less than 0.05°. The SoC system designed in this paper is high precision, integrated and scalable, which meets the requirements of micro-terminal.
Keywords:micro positioning navigation and timing terminal(MPNTT)  SoC system  integrated navigation filtering algorithm  miniaturization
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