| 基于FPGA的M位并行分布式算法的FIR滤波器设计 |
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| 作者单位： | 北京航空航天大学电子信息工程学院 北京100083 |
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| 摘 要： | 介绍基于查找表结构的分布式算法的基本原理,提出M位并行分布式算法的实现方法。以2位并行分布式算法结构的FIR滤波器设计为例,在Altera Cyclone系列芯片上实现32阶12位FIR滤波器,并对其性能和资源占用进行分析。
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| 关 键 词： | FIR滤波器 FPGA 分布式算法 查找表 |
FIR Filter Design on FPGA Using M-bit Parallel Distributed Arithmetic |
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| Authors: | Xu Huafeng Zhao Qi |
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| Abstract: | The distributed arithmetic is introduced in this paper and an efficient architecture for the FIR filter basedon FPGA is proposed that employs the M-bit parallel distributed arithmetic(M-bit PDA).Altera Cyclone is used as a target device.A 32-tap FIR filter is designed using the 2-bit PDA structure.Its performance and hardware consumption are analyzed in this paper. |
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| Keywords: | FIR filter FPGA Distributed arithmetic Look-up table(LUT) |
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