基于FPGA的时间数字转换技术综述

基于FPGA的时间数字转换（FPGA-Based Time to Digital Converters, FPGA-TDC）具有较短的开发周期和更灵活的开发方式，随着针对TDC的研究工作越来越多，应用于不同场景的各种FPGA-TDC架构也相应出现，但是对于这些架构的分类和命名，并没有一个统一的标准。本文采用一种以分辨率来源为分类依据的方法，对近几年国内外研究机构关于FPGA-TDC的成果进行了分类，综述了该领域的技术方法，总结了各类架构的优缺点，并且对FPGA-TDC未来的发展做出了展望。

Overview of TDC Technology Based on FPGA

The FPGA-TDC has a shorter development cycle and more flexible development methods. With the increasing research on TDC, various FPGA-TDC architectures applied to different scenarios have also emerged. However, there is no unified standard for the classification and naming of these architectures. This article adopts a classification method based on resolution sources to classify the achievements of domestic and foreign research institutions on FPGA-TDC in recent years, summarizes the technical methods in this field, summarizes the advantages and disadvantages of various architectures, and makes prospects for the future development of FPGA-TDC.