High Data Rate SHF Communication Receiver

This paper describes an SHF receiver capable of demodulating analog or digital information rates of up to 50 Mc/s. The receiver is a dual conversion superheterodyne design having a first IF of 1660 Mc/s and a second IF of 445 Mc/s. The model was developed as part of an Air Force contract to study and evaluate design techniques aimed at increasing reliability of aerospace SHF communication equipment. Semiconductor circuitry is used throughout, in addition to numerous deposited thin film circuits for reliability enhancement. The second IF amplifier design is unique in that all circuit components, with the exception of the semiconductors, are deposited, whereas more conventional microelectronics approaches to date have employed externally connected, discrete-component, frequency-selective devices, such as tunable IF coils or filter networks.