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基于FPGA的高分辨力时间数字转换器的应用研究
引用本文:张慧君,李孝辉,边玉敬.基于FPGA的高分辨力时间数字转换器的应用研究[J].宇航计测技术,2009,29(4):41-44.
作者姓名:张慧君  李孝辉  边玉敬
作者单位:1. 中国科学院国家授时中心,临潼710600;中国科学院研究生院,北京,100049
2. 中国科学院国家授时中心,临潼,710600
基金项目:国家863计划资助项目 
摘    要:高分辨力时间间隔测量技术在许多研究和应用领域中都具有十分重要的地位。基于FPGA技术,利用高分辨力时间数字转换器TDC芯片,设计出了一种高准确度时间间隔测量系统,该系统可以工作在不同模式及分辨力,也可以进行不同通道的选择,最多可以达到8个测量通道。测量结果显示,该测量系统可以达到18.6ps的标准偏差。

关 键 词:时间数字转换器  分辨力  时间间隔  门电路阵列

Application Research of the Time to Digital Converter with High Resolution Based on FPGA
ZHANG Hui-jun,LI Xiao-hui,BIAN Yu-jin.Application Research of the Time to Digital Converter with High Resolution Based on FPGA[J].Journal of Astronautic Metrology and Measurement,2009,29(4):41-44.
Authors:ZHANG Hui-jun  LI Xiao-hui  BIAN Yu-jin
Institution:ZHANG Hui-jun LI Xiao-hui BIAN Yu-jing (1. National Time Service Center, Chinese Academy of Sciences, Lintong 710600; 2. Graduate University of Chinese Academy of Sciences,Beijing, 100049)
Abstract:In many research and application fields, the measurement technology with high resolution for time interval plays an important role. Using high resolution time to digital converter TDC chip, a high accuracy time interval measurement system is designed based on FPGA. The measurement system can work under different mode and resolution. Also, an option for channels is implemented and the number of measurement channels is up to 8. According to the measurement results, the standard deviation of the system can be 18.6 ps.
Keywords:Time to digital converter(TDC) Resolution Time interval Gate array
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