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IIR滤波器在芯片原子钟中的应用
引用本文:阮恩梅,吴红卫,陈杰华,顾思洪.IIR滤波器在芯片原子钟中的应用[J].宇航计测技术,2017,37(1):35-38.
作者姓名:阮恩梅  吴红卫  陈杰华  顾思洪
作者单位:1、中国科学院武汉物理与数学研究所,原子频标重点实验室,武汉 430071
基金项目:国家自然科学基金(11304362,11604371).
摘    要:芯片原子钟是具有小体积,低功耗特点的原子钟。本文采用了IIR滤波器方案对芯片原子钟物理系统输出信号进行处理,该方案有利于减小芯片原子钟的体积、提高芯片原子钟短期频率稳定度。实验结果表明,与FIR滤波方案相比,IIR滤波器使用的FPGA资源减小了约58%;与现有模拟滤波方案相比,使用IIR滤波器方案的芯片原子钟频率稳定度提高了1.4×10~(-10)τ~(-1/2)(τ=1s-100s),电路面积减小了10%。

关 键 词:IIR滤波器    芯片原子钟    数字滤波    级联型

Application of IIR Filter in Chip-scale Atomic Clock
RUAN En-mei,WU Hong-wei,CHEN Jie-hua,GU Si-hong.Application of IIR Filter in Chip-scale Atomic Clock[J].Journal of Astronautic Metrology and Measurement,2017,37(1):35-38.
Authors:RUAN En-mei  WU Hong-wei  CHEN Jie-hua  GU Si-hong
Institution:1、Key Laboratory of Atomic Frequency Standards,Wuhan Institute of Physics and Mathematics,Chinese Academy of Sciences,Wuhan,Hubei 430071,China
Abstract:Chip-scale atomic clock (CSAC) is a type of miniaturized coherent population trapping (CPT) atomic clock with small scale and low-power.In this paper,we adopted the design of IIR filter to deal with output signal of CSAC.The design can help reduce the volume and improve short-term frequency stability of CSAC The experimental result shows that resources IIR filter occupied is reduced by nearly 58% while compared with FIR filter.Besides,the short-term frequency stability of CSAC is improved by1.4×10-10τ-1/2(τ=1s-100s)and the circuit size is reduced by 10% when compared with analog filter.
Keywords:IIR filter                                                                                                                        Chip-scale atomic clock                                                                                                                        Digital filter                                                                                                                        Cascaded
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