| 一种高效稳定的LDO线性稳压器设计 |
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| 引用本文： | 胡锦,刘观承,黑花阁,刘清波.一种高效稳定的LDO线性稳压器设计[J].宇航计测技术,2011(4):67-70. |
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| 作者姓名： | 胡锦 刘观承 黑花阁 刘清波 |
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| 作者单位： | 湖南大学物理与微电子科学学院; |
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| 摘 要： | 设计了一种准确输出的低压差（LDO）线性电压稳压器。通过采用改进型密勒补偿技术和高电流效率缓冲电路来改善传统LDO线性电压稳压器的稳定性，并采用了一种低噪声的带隙基准电压源的拓扑架构，有效解决了稳压器的噪声问题。在Cadence Virtuoso IC平台下采用TSMC-0．35μm-2P3M的CMOS混合信号工艺进行了仿真和版图设计，仿真结果表明该电压稳压器达到设计目的。
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| 关 键 词： | 稳压器 环路 稳定性 抑制比 |
Design of Precise Low Dropout Voltage Regulator |
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| HU Jin LIU Guan-cheng HEI Hua-ge LIU Qing-bo.Design of Precise Low Dropout Voltage Regulator[J].Journal of Astronautic Metrology and Measurement,2011(4):67-70. |
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| Authors: | HU Jin LIU Guan-cheng HEI Hua-ge LIU Qing-bo |
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| Institution: | HU Jin LIU Guan-cheng HEI Hua-ge LIU Qing-bo(College of Physics and Microelectronic Science,Hunan University,Changsha 410082) |
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| Abstract: | A precise low-dropout （LDO） linear regulator is designed. Two techniques are utilized for solving the stability of conventional linear regulators, including the technology of improved miller compensation and high current-efficiency buffer. Moreover, to reduce the intrinsic noise of the regulator itself, a low-noise topology to design the bandgap reference is also adopted. The process of TSMC-0.35μm-2P3M CMOS mixed-signal is used under Cadence Virtuoso IC platform to perform the simulation and layout design, and simulation results show that our purpose can be achieved. |
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| Keywords: | Regulator Loop Stability Suppression rate |
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