双绕组感应发电机静止励磁调节器的锁相环研究

双绕组感应发电机具有随负载变化调节励磁磁场、保持负载电压恒定不变的优点,通过静止励磁调节器输出的有功电流控制母线电压、无功电流控制负载电压,两者经过坐标变换形成反馈电流,实现系统的闭环控制。锁相环(PLL)为坐标变换提供相位信息,选用合适的PLL可以提高坐标变换的动静态性能,为控制系统提供快速准确的反馈信息。分析了双绕组感应发电机励磁电压的特点,分析了双dq变换PLL、延时信号对消PLL、基于延时信号对消的滑动平均滤波PLL的各自工作特点,最后优选了基于延时信号对消的滑动平均PLL检测励磁电压相位。     

用于非线性有源天线的耦合锁相环特性分析

为实现非线性有源天线阵波束扫描,研究了互耦锁相环(PLL)的基本特性。通过对互耦PLL的相位动力学方程的稳定性进行分析,建立了具有延时的阵列模型;通过调节环路延时,互耦PLL不同的非线性动力学特性;采用四单元的耦合锁相环阵列实验电路对理论分析进行了验证,从而提出了在设计基于耦合锁相环的非线性有源天线时,必须对环路延时进行控制,防止环路出现振荡和混沌现象。     

Phase-Lock Loop Jump Phenomenon in the Presence of Two Signals

Jump phenomena are known to exist in many non-linear systems [I], [2], [3]. The non-linear analysis presented in this paper explains and predicts the conditions for the jump phenomenon that is observed in a phase-locked loop (PLL) preceded by an automatic gain control (AGC). The jump phenomenon occurs when the frequency separation AM of two sinusoids at the input to the AGC is greater than the bandwidth B of the linearized PLL. If the loop is initially locked to the stronger signal, the weaker signal will frequency-modulate the PLL voltage-controlled oscillator (VCO) with a modulation frequency AI. The amplitude S2 of the weaker signal al can be increased until it becomes greater than the amplitude Si of the signal being tracked, without causing the loop to lose lock; i. e., the VCO continues to track the original signal. However, if the ratio of the amplitudes S2 S1 = R is increased above some critical value RC > 1, the loop will lose lock on the original signal, and jump to track the interfering signal. If the frequency separation is at least twice the PLL bandwidth, a good approximation for this critical ratio is Rc ? ?w/B.     

Interferences in Phase-Locked Loops

An analysis of the behavior of a second-order phase-locked loop is presented when an unwanted signal is added to the useful signal. Both signals are sinusoidal and unmodulated, and the analysis is made in the absence of additive noise. When the loop remains locked on the useful signal, a parasitic signal exists at the phase detector output. This signal produces a parasitic phase modulation of the VCO and a static phase error in the loop. The parasitic signal amplitude, the parasitic phase modulation index, and the static phase error are calculated. A necessary condition for the loop to remain in lock is derived. When the loop is initially unlocked, locking can occur either on the useful signal or on the unwanted signal, depending on the amplitude ratio and the frequency difference of the two signals. A formula allowing one to compute the pull-in time is obtained. When the loop locks on the useful signal, acquisition can be slower or faster than in the absence of an unwanted signal. The same phenomenon is observed when the loop locks on the unwanted signal.     

基于UKF准开环结构的高动态载波跟踪环路

 对高动态环境下的全球卫星导航系统（GNSS）载波信号跟踪方法进行了研究。在分析高动态载波信号模型的基础上,提出了一种基于无迹卡尔曼滤波（UKF）的准开环载波跟踪方法。此方法能够消除导航数据二进制相移键控(BPSK)调制的影响,并采用四维UKF相位估计模型提高跟踪精度,同时对估计值进行补偿以减少滤波器的滞后性。通过模拟接收机的高动态运动轨迹,从跟踪误差、跟踪结果和补偿效果3个方面,与基于卡尔曼滤波（KF）的锁频环(FLL)辅助锁相环(PLL)结构的传统跟踪方法进行比较,结果表明基于UKF的准开环跟踪方法能够有效地完成高动态环境下的载波跟踪。     

一种用于深空测距的数字化锁相环设计

在深空测距中，扩大锁相环捕获范围与提高锁相环对微弱信号检测能力是一对矛盾。为解决这一矛盾，本文提出一种基于频率引导与二次混频的数字化锁相环结构，并对其性能进行理论分析和计算机仿真。仿真结果表明，该锁相环可以很好地在较大范围内实现对微弱测距信号的捕获锁定。该结构已在实际测距接收机中使用。     

Low C/N_0 Carrier Tracking Loop Based on Optimal Estimation Algorithm in GPS Software Receivers

Suppressing jitter noises in a phase locked loop(PLL) is of great importance in order to keep precise and continuous track of global positioning system(GPS) signals characterized by low carrier-to-noise ratio(C/N0).This article proposes and analyzes an improved Kalman-filter-based PLL to process weak carrier signals in GPS software receivers.After reviewing the optimal-bandwidth-based traditional second-order PLL,a Kalman-filter-based estimation algorithm is implemented for the new PLL by decorrelating the model error noises and the measurement noises.Finally,the efficiency of this new Kalman-filter-based PLL is verified by experimental data.Compared to the traditional second-order PLL,this new PLL is in position to make correct estimation of the carrier phase differences and Doppler shifts with less overshoots and noise disturbances and keeps an effective check on the disturbances out of jitter noises in PLL.The results show that during processing normal signals,this improved PLL reduces the standard deviation from 0.010 69 cycle to 0.007 63 cycle,and for weak signal processing,the phase jitter range and the Doppler shifts can be controlled within ±17° and ±5Hz as against ±25° and ±15 Hz by the traditional PLL.     

Carrier loop architectures for tracking weak GPS signals

The performance of various carrier recovery loop architectures (phase lock loop (PLL), Doppler-aided PLL, frequency lock loop (FLL), and Doppler-aided FLL) in tracking weak GPS signals are analyzed and experimentally validated. The effects of phase or frequency detector design, oscillator quality, coherent averaging time, and external Doppler aiding information on delaying loss of lock are quantified. It is shown that for PLLs the metric of total phase jitter is a reliable metric for assessing low C/N performance of the tracking loop provided the loop bandwidth is not too small (~> 5 Hz). For loop bandwidths that are not too small, total phase jitter accurately predicts carrier-to-noise ratio (C/N) at which loss of lock occurs. This predicted C/N is very close to the C/N predicted by bit error rate (BER). However, unlike BER, total phase jitter can be computed in real-time and an estimator for it is developed and experimentally validated. Total phase jitter is not a replacement for BER, since at low bandwidths it is less accurate than BER in that the receiver loses lock at a higher C/N than predicted by the estimator. Similarly, for FLLs operating at small loop bandwidths, it is found that normalized total frequency jitter is not a reliable metric for assessing loss of lock in weak signal or low C/N conditions. At small loop bandwidths, while total frequency jitter may indicate that a loop is still tracking, the Doppler estimates provided by the FLL will be biased.     

Optimum Acquisition of the Idling First-Order Phase-Locked Loop

Acquisition of the idling first-order phase-locked loop (PLL) is investigated. An analytical solution for the Fokker-Planck equation is found if the noise term is neglected. Furthermore, the modulation signal that optimizes the acquisition is obtained by use of phase-plane techniques and Pontryagin's minimum principle.     

带通限幅器对锁相环噪声性能的影响

锁相环路中,在鉴相器前加上AGC（自动增益控制）,可以使环路性能在输入信噪比发生变化时保持稳定,带通限幅器也可以起到类似作用。尽管有一些文章对限幅器的性能作了研究,但是在PLL（锁相环）闭环条件下,鲜有文章分析其对环路噪声性能的影响。因此,文章以基本PLL环路的数学模型为基础,推导出PLL中分别加入相干AGC和带通限幅器后新的环路数学模型,以一阶PLL为例,计算和比较不同控制方式下环路相位误差均方值的变化,最后说明应当根据飞行任务的不同选择对环路更有利的控制方式。     

一种改进双块补零北斗导航接收机弱信号捕获方法

利用卫星导航系统对高轨航天器进行自主导航与高精度定轨,对接收机的捕获灵敏度要求极高,双块补零(DBZP)算法是无辅助下卫星导航弱信号捕获的理想方案,然而受限于数据处理量大,DBZP实际应用难度大。在深入分析双块补零机理的基础上,结合矩阵重构的思想,提出了一种改进双块补零北斗导航接收机弱信号捕获方法。该方法对参与块内相关运算的基带信号和本地测距码分别进行重构,解决了块内点数与快速傅里叶变换输入点数之间的矛盾,提高了北斗导航接收机弱信号捕获性能。仿真实验结果分析表明,改进双块补零算法对信噪比没有损失,可以保证对低至15dB·Hz的弱信号进行有效捕获,能够满足高轨航天器定轨、室内外无缝导航等对接收机高灵敏度的需求。本方法是在块内运算层面对DBZP进行优化,具备良好的通用性和可移植性,与优化相干积分策略的各种改进DBZP算法可以无缝对接,进一步提高北斗导航接收机信号处理的效能。同时,重构的思想也适用于其他采用码分多址信号的卫星导航系统的弱信号检测和捕获,对提升多星座卫星导航系统的基带信号处理性能具有参考意义。     

基于DDS+PLL的光源调制与功率稳定控制方法CSCD

量子传感器是基于量子操控技术的研究成果,一般具有高精度、小体积等优势。激光器是量子传感器的核心部件,有抽运和检测功能,激光器的稳定性对量子传感器具有重要的意义。提出了一种直接数字合成法(DDS)与锁相回路(PLL)相结合的方法,对激光器进行调制并抑制调制噪声,实现了激光器的稳定输出。基于现有小型量子传感器装置,在DDS生成4kHz参考信号的情况下实现了激光器电流8kHz调制,抑制了调制时调制电流信号噪声约8dB,并提高了激光器输出光功率的稳定性。     

GPS软件接收机的捕获与跟踪算法

研究了GPS软件接收机的捕获与跟踪算法。分析了时域串行滑动相关捕获算法和频域基于FFT的并行相关捕获算法,设计了适合GPS软件接收机的并行算法,实现了对空中可见卫星的捕获。针对GPS信号的特点,设计了基于DLL与PLL相结合方法的GPS跟踪算法。利用实测中频信号对上述捕获与跟踪算法进行了验证分析,测试结果表明,基于FFT的并行相关捕获算法能够有效增强软件接收机的捕获能力,采用DLL与PLL相结合的方法能够实现对GPS信号的有效跟踪。     

Effects of Automatic Gain Control on Phase-Locked Loop Behavior in the Presence of Interference

The behavior of a second-order phase-locked loop (PLL) in the presence of an interfering signal has been analyzed by different authors with different results. The discrepancy is attributed to the presence or absence of an automatic gain controlled amplifier preceeding the PLL. Simulation results verify that the presence of the automatic gain controlled amplifier reduces the tendency of the PLL to break lock from the desired signal in favor of the interfering signal     

Uniform Sampling Analysis of a Hybrid Phase-Locked Loop with a Sample-and-Hold Phase Detector

Phase-locked-loop (PLL) bit synchronizers often employ integrate-and-dump type phase detectors that provide phase error information only at discrete points in time. Usually these phase detectors are followed by sample-and-hold circuits to produce a stairstep error voltage as the input to a standard analog circuit loop filter. When the loop is configured in this manner, it is referred to as a hybrid PLL. Sampled-data analysis methods (Z transforms) are used to determine the stability and transient response of this loop.     

Performance analysis of GPS carrier phase observable

The accuracy analysis of Global Positioning System (GPS) carrier phase observable measured by a digital GPS receiver is presented. A digital phase-locked loop (DPLL) is modeled to extract the carrier phase of the received signal after a pseudorandom noise (PRN) code synchronization system despreads the received PRN coded signal. Based on phase noise characteristics of the input signal, the following performance of the first, second, and third-order DPLLs is analyzed mathematically: (1) loop stability and transient process; (2) steady-state probability density function (pdf), mean and variance of phase tracking error; (3) carrier phase acquisition performance; and (4) mean time to the first cycle-slipping. The theoretical analysis is verified by Monte Carlo computer simulations. The analysis of the dependency of the phase input noise and receiver design parameters provides with an important reference in designing the carrier phase synchronization system for high accuracy GPS positioning     

基于鉴相器的矢量跟踪环设计

基于鉴相器的矢量跟踪环是锁定导航卫星码和载波的一种跟踪算法,这种算法适合于在弱信号环境下进行跟踪。矢量环不仅充分利用信号跟踪和导航状态解算之间的内在耦合关系,而且每一通道中采用鉴相器和锁频环结合的方式,系统一步内完成信号跟踪和导航解算任务。反馈控制量NCO是由导航滤波器和环路内部滤波器共同产生。实验表明,矢量跟踪环具有快速重捕获特性,能够在弱信号的环境下运行,比起传统环路有更小的跟踪误差。     

基于FPGA的BOC(1,1)信号捕获技术

BOC调制是新一代卫星导航系统中广泛采用的调制方式,在时域上具有多峰值特性,副峰的存在增加了捕获的难度。采用自相关副峰消除技术(ASPeCT)在原有的BOC码相关支路的基础上增加一条伪码相关支路,可以有效削弱码相位检测函数的副峰,避免误捕获,是一种性能良好的BOC信号捕获技术。提出一种采用二维并行快速搜索的在FPGA芯片中实现ASPeCT捕获技术的方案,可以显著缩短捕获时间。在理论分析和仿真验证的基础上,采用Verilog硬件描述语言在接收机FPGA+DSP平台上编程实现,在露天测试中,成功捕获到Galileo E1B卫星导航信号,并对ChipScope采集的数字中频信号的多普勒频率和码相位静态捕获结果进行验证,与同一段信号的Matlab仿真结果一致,证明所提出的技术方案正确合理可行。     

Frequency Tracking Characteristics of Split-Loop Phase-Locked Receivers

The excess time delay introduced by the incorporation of the intermediate frequency (IF) stage within the phase-locked loop (PLL) causes serious deterioration in the acquisition and tracking performance of the loop. The split-loop phase-locked system suggested by McGeehan and Sladen considerably reduces the effect of time delay on the acquisition and tracking performance of the loop. The frequency acquisition characteristics of the split-loop phase-locked receiver is investigated, and the effect of possible asymmetry in the arms of the loop on the acquisition range is examined. Closed-form approximate formulas are derived, and a comparison between split-, long-, and short-loop acquisition performance is presented.     

一种基于TDDM裂谱信号的解模糊位搜索法

时分数据调制(TDDM)裂谱信号作为一种新调制信号,具有独有的电文翻转位模糊特性,导致了采用通常的搜索方法无法正确输出电文的现象。针对TDDM裂谱信号特性以及现有搜索方法的不足,提出了一种解模糊位搜索法。该方法主要分为合路快捕及解模糊位判决两个阶段。其合路快捕阶段,不但可以快速缩小搜索范围,而且可以避免由扩频方式而引起的漏捕现象;解模糊位判决阶段,可以去除电文翻转位的模糊度,正确输出电文的翻转位置。在理论推导的基础上,从性能及信噪比容限角度进行了仿真测试,测试结果表明,解模糊位搜索法对TDDM裂谱信号的电文翻转位判决精度可以达到100%。