| Abstract: | In the inter-statellite link self-tracking system. The jitter size of the error signal in the angle tracking receiver determines the antenna tracking accuracy and stability. In order to reduce the jitter of error signal, a 16-point weighted average sliding window algorithm is implemented on FPGA in this paper. The algorithm firstly analyzes the frequency spectrum of the error signal and finds out the frequency distribution range of the error signal. Then according to the sampling rate of error signal and frequency distribution range of error signal, the weighted sliding window number and weighting coefficient are determined. Finally, this algorithm was implemented on FPGA. In the process of implementation, bucket data shift was adopted to reduce 15 addition and 1 division operations to one addition, one subtraction and one truncation operation, and the FPGA resource usage was reduced by 90%. The actual test results show that the algorithm can effectively smooth the error signal of the angular tracking receiver, thus solving the problem that the error signal jitter does not meet the requirement of the index in the case of low SNR and high information rate. The error signal jitter is reduced from about 0.25V to about 0.06V, which significantly improves the system performance. |
