| 基于任务映射的暗硅芯片功耗预算方法 |
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| 引用本文： | 李鑫,李智,周巍,吴瑞祺,唐浩然,陈业航.基于任务映射的暗硅芯片功耗预算方法[J].北京航空航天大学学报,2022,48(7):1115-1124. |
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| 作者姓名： | 李鑫 李智 周巍 吴瑞祺 唐浩然 陈业航 |
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| 作者单位： | 1.西北工业大学 电子信息学院, 西安 710072 |
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| 基金项目： | 国家自然科学基金61501377陕西省自然科学基础研究计划2021JM-074 |
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| 摘 要： | 暗硅系统功耗预算问题可被归类为一种NP-hard问题，针对其存在的提高芯片均温与降低通信成本2个对立优化目标，提出了一种基于任务映射的暗硅芯片功耗预算方法。为降低计算复杂度，基于率先映射高通信量并对后续映射影响较小的任务的规则建立模型，将任务图转换为最大生成树的形式，以优先级值的大小决定任务进行映射的先后顺序。在稳态情况下逐个进行核心寻优，将排序后的任务放置于合适的核心位置，并以凸二次规划问题形式对已确定映射核心位置的功耗预算进行求解。实验表明:针对12开启核心的36核心系统，与经典的热安全功耗预算方法相比，所提方法将总功耗预算提高了11.8%，通信能耗降低了38.2%。
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| 关 键 词： | 暗硅 功耗预算 任务映射 多核系统 动态热管理 |
| 收稿时间： | 2021-01-11 |
A power budgeting method for dark silicon chips based on task mapping |
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| Affiliation: | 1.School of Electronics and Information, Northwestern Polytechnical University, Xi'an 710072, China2.Honors College, Northwestern Polytechnical University, Xi'an 710072, China3.School of Software, Northwestern Polytechnical University, Xi'an 710072, China4.School of Computer Science, Northwestern Polytechnical University, Xi'an 710072, China |
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| Abstract: | The power budgeting for dark silicon systems can be regarded as a NP-hard problem. To achieve two opposite optimization objectives of improving chip average temperature and reducing communication cost, a power budgeting method based on task mapping for dark silicon chips is proposed. To reduce the computational complexity, a model is established to transform the task graph into a maximum spanning tree, based on the rule that the task with high throughput and less impact on subsequent mapping is mapped first. The priority value determines the mapping order of tasks. Then, the core-by-core optimization is carried out in a steady state. The sorted tasks are assigned to appropriate active cores. The power budgets of the identified active cores are solved in the form of convex quadratic programming. Experimental results show that compared with the classical thermal safe power budgeting method, the method proposed increases the total power budget by 11.8% and reduces the communication energy consumption by 38.2% for 36-core system with 12 active cores. |
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